CS4239 Datasheet, PDF (62/98 Pages) Cirrus Logic – CrystalClear™ Portable ISA Audio System

CS4239
CrystalClear^TM Portable ISA Audio System
Wavetable & Volume Control (C8)
Default = 0exxee00
D7 D6 D5 D4 D3
VCIE VCF1 res res WTEN
D2
VCEN
D1
DMCLK
D0
BRES
BRES
Force BRESET low. When set, the
BRESET pin is forced low. Typically
used for power management of pe-
ripheral devices.
DMCLK
Disable MCLK. When set, the MCLK
pin of the CS9236 Wavetable Syn-
thesizer serial interface is forced low
providing a power savings mode.
VCEN
Volume Control Enable. When set,
the UP, DOWN, and MUTE pins be-
come active and provide hardware
master volume control for the line
outputs. Note that this bit can be in-
itialized at power-up through
Hardware Configuration data, Misc.
Configuration Byte.
WTEN
Wavetable Serial Port Enable. When,
set, the CS9236 Single-Chip Wave-
table Music Synthesizer serial port
pins are enabled. WTEN can be in-
itialized in the E²PROM Hardware
Configuration data, Global Configura-
tion byte.
VCF1
Hardware Volume Control Format.
This bit controls the format of the
UP, DOWN, and MUTE pins. VCF1
is initialized in the E²PROM Hard-
ware Configuration data, Global
Configuration byte.
0 - MUTE is a momentary button.
Pressing MUTE toggles between
mute and un-mute. Pressing UP or
DOWN will always un-mute.
1 - MUTE is not used. Pressing the
up and down buttons simultane-
ously causes the volume to mute.
Pressing up or down singularly will
un-mute.
VCIE
Volume Control Interrupt Enable.
When set, the hardware volume
control pins cause interrupts, when
pressed, on the WSSint pin. The
status is available in CTRLbase+7,
IMV bit.
Power Management (C9)
Default = 0xxxx000
D7 D6 D5 D4
RESET res res res
D3 D2 D1 D0
res MIXCD DAC2 SPORT
SPORT
Powers down the serial ports.
DAC2
Powers down DAC2 including FM and
the CS9236 serial interface.
MIXCD
Powers down the analog mixer - with
the exception of MIN, AUX2, and the
line outputs.
RESET
When this bit goes from a 1 to a 0, a
software RESDRV is initiated caus-
ing the entire chip to be reset and
placed in its default power-up con-
figuration. Access to all registers on
this chip will be lost, including this
one, since the power-up state for
PnP is all resources unassigned.
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DS253PP2