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AMC1210 Datasheet, PDF (30/47 Pages) Burr-Brown (TI) – Quad Digital Filter for 2nd-Order Delta-Sigma Modulator
AMC1210
SBAS372A – APRIL 2006 – REVISED OCTOBER 2006
www.ti.com
High-Level Threshold Register (addresses 0x04, 0x0A, 0x10 and 0x16)
The High-Level Threshold Register contains the upper level value of the interrupt threshold for the comparator
filter. If the value of the comparator filter is equal to or above the high level threshold, the corresponding interrupt
flag is set (if enabled). Table 17 describes the High-Level Threshold Register.
Bit 15
–
Bit 14
HLT14
Bit 13
HLT13
Bit 12
HLT12
Table 17. High-Level Threshold Register
Bit 11 Bit 10
HLT11 HLT10
Bit 9
HLT9
Bit 8
HLT8
Bit 7
HLT7
Bit 6
HLT6
Bit 5
HLT5
Bit 4
HLT4
Bit 3
HLT3
Bit 2
HLT2
Bit 1
HLT1
Bit 0
HLT0
'0'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
'1'
R
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
BIT POSITION
15
14–0
BIT
–
HTL14–HLT0
DESCRIPTION
Unused. Always read '0'.
Unsigned high level threshold for the comparator filter output.
Low-Level Threshold Register (addresses 0x05, 0x0B, 0x11 and 0x17)
The Low-Level Threshold Register contains the lower level of the interrupt threshold for the comparator filter. If
the value of the comparator filter is equal to or below the low level threshold, the corresponding interrupt flag is
set (if enabled). Table 18 describes the Low-Level Threshold Register.
Bit 15
–
Bit 14
LLT14
Bit 13
LLT13
Bit 12
LLT12
Table 18. Low-Level Threshold Register
Bit 11 Bit 10
LLT11 LLT10
Bit 9
LLT9
Bit 8
LLT8
Bit 7
LLT7
Bit 6
LLT6
Bit 5
LLT5
Bit 4
LLT4
Bit 3
LLT3
Bit 2
LLT2
Bit 1
LLT1
Bit 0
LLT0
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
'0'
R
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
BIT POSITION
15
14–0
BIT
–
LTL14–LLT0
DESCRIPTION
Unused. Always read '0'.
Unsigned low level threshold for the comparator filter output.
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