PALCE29M16H-25 Datasheet, PDF (8/22 Pages) Advanced Micro Devices – 24-Pin EE CMOS Programmable Array Logic

AMD
POSSIBLE CONFIGURATIONS OF THE INPUT/OUTPUT LOGIC MACROCELL
DQ
Q
S0 = 1
S1 = 0
S3 = 1
S8 = 1
S2 = 1
08740G-14
Output Registered/Active Low,
Register Feedback
DQ
Q
S0 = 1
S1 = 1
S3 = 1
S8 = 1
S2 = 1
08740G-15
Output Combinatorial/Active Low,
Register Feedback
DQ
LE Q
S0 = 1
S1 = 0
S3 = 1
S8 = 1
S2 = 0
08740G-16
Output Latched/Active Low,
Latched Feedback
DQ
LE Q
S0 = 1
S1 = 1
S3 = 1
S8 = 1
S2 = 0
08740G-17
Output Combinatorial/Active Low,
Latched Feedback
Figure 3b. Single Feedback Macrocells (continued)
D
Q
SSS382
=
=
=
=
0
1
1
0
(For Single
Register
Latch
Feedback
Only)
Programmable-AND Array
Input Registered/Latched
Figure 3c. All Macrocells
08740G-18
2-334
PALCE29M16H-25