PALCE29M16H-25 Datasheet, PDF(1/22 Page) Advanced Micro Devices – 24-Pin EE CMOS Programmable Array Logic

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PALCE29M16H-25 Datasheet, PDF (1/22 Pages) Advanced Micro Devices – 24-Pin EE CMOS Programmable Array Logic

FINAL

COMâL: H-25

PALCE29M16H-25

24-Pin EE CMOS Programmable Array Logic

Advanced

Micro

Devices

DISTINCTIVE CHARACTERISTICS

s High-performance semicustom logic

replacement; Electrically Erasable (EE)

technology allows reprogrammability

s 16 bidirectional user-programmable I/O logic

macrocells for Combinatorial/Registered/

Latched operation

s Output Enable controlled by a pin or product

terms

s Varied product term distribution for increased

design flexibility

s Programmable clock selection with two clocks/

latch enables (LEs) and LOW/HIGH clock/LE

polarity

s Register/Latch Preload permits full logic

verification

s High speed (tPD = 25 ns, fMAX = 33 MHz and fMAX

internal = 50 MHz)

s Full-function AC and DC testing at the factory

for high programming and functional yields

and high reliability

s 24-Pin 300 mil SKINNYDIP and 28-pin plastic

leaded chip carrier packages

s Extensive third-party software and programmer

support through FusionPLD partners

GENERAL DESCRIPTION

The PALCE29M16 is a high-speed, EE CMOS Pro-

grammable Array Logic (PAL) device designed for gen-

eral logic replacement in TTL or CMOS digital systems.

It offers high speed, low power consumption, high pro-

gramming yield, fast programming and excellent reli-

ability. PAL devices combine the flexibility of custom

logic with the off-the-shelf availability of standard prod-

ucts, providing major advantages over other semicus-

tom solutions such as gate arrays and standard cells,

including reduced development time and low up-front

development cost.

BLOCK DIAGRAM

CLK/LE

I/CLK/LE

I/OF7

I/OF6

I/O7

I/O6

I/O 5

I/O4

I/OF5

I/OF4

PTs

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic PTs

Macrocell

Programmable

AND Array

58 x 188

PTs

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell

I/O

Logic

Macrocell PTs

I 0 -I2 I/OE

I/OF0

I/OF1

I/O0

I/O1

I/O2

I/O 3

I/OF2

I/OF3

08740G-1

Publication# 08740 Rev. G Amendment /0

Issue Date: June 1993

2-327

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