PALCE29M16H-25 Datasheet, PDF (19/22 Pages) Advanced Micro Devices – 24-Pin EE CMOS Programmable Array Logic

PRELOAD
The PALCE29M16 has the capability for product-term
Preload. When the global-preload product term is true,
the PALCE29M16 will enter the preload mode. This fea-
ture aids functional testing by allowing direct setting of
register states. The procedure for Preload is as follows:
Set the selected input pins to the user selected
preload condition.
Apply the desired register value to the I/O pins.
This sets Q of the register. The value seen on the
I/O pin, after Preload, will depend on whether the
macrocell is active high or active low.
Parameter
Symbol
tD
tW
tI/O
Parameter Description
Delay Time
Pulse Width
Valid Output
AMD
Pulse the clock pin (pin 1).
Remove the inputs to the I/O pins.
Remove the Preload condition.
Verify VOL/VOH for all output pins as per pro-
grammed pattern.
Because the Preload command is a product term, any
input to the array can be used to set Preload (including
I/O pins and registers). Preload itself will change the val-
ues of the I/O pins and registers. This will have unpre-
dictable results. Therefore, only dedicated input pins
should be used for the Preload command.
Min
Rec.
Max
Unit
0.5
1.0
5.0
µs
250
500
700
ns
100
500
ns
Inputs
I/O Pins
CLK
Pin 1 (2)
Preload Mode
tD
Data to be
Preloaded
tD
tD
tW
Preload Waveform
VIH
VIL
tIO
VOH/VIH
VOL/VIL
VIH
VIL
08740G-36
PALCE29M16H-25
2-345