PALCE29M16H-25 Datasheet, PDF (13/22 Pages) Advanced Micro Devices – 24-Pin EE CMOS Programmable Array Logic

AMD
CAPACITANCE (Note 1)
Parameter
Symbol
Parameter Description
Test Conditions
Typ
Unit
CIN
Input Capacitance
VIN = 0 V
VCC = 5.0 V, TA = 25°C,
5
pF
COUT
Output Capacitance
VOUT = 0 V
f = 1 MHz
8
pF
Note:
1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified
where capacitance may be affected.
SWITCHING CHARACTERISTICS
Registered Operation
Parameter
Symbol Parameter Description
Combinatorial Output
tPD
Input or I/O Pin to Combinatorial Output
Output Register
tSOR
Input or I/O Pin to Output Register Setup
tCOR
Output Register Clock to Output
tHOR
Data Hold Time for Output Register
Input Register
tSIR
I/O Pin to Input Register Setup
tCIR
Register Feedback Clock to Combinatorial Output
tHIR
Data Hold Time for Input Register
Clock and Frequency
tCIS
Register Feedback to Output Register/Latch Setup
fMAX
Maximum Frequency 1/(tSOR + tCOR)
fMAXI
Maximum Internal Frequency 1/tCIS
tCWH
Pin Clock Width HIGH
tCWL
Pin Clock Width LOW
Min Max Unit
25
ns
15
ns
15
ns
0
ns
2
ns
28
ns
6
ns
20
ns
33.3
MHz
50
MHz
8
ns
8
ns
CLK
tSIR
I/O
AND-OR
tCIS ^Array tCIS
Input
Register
Output
tCOR
Register
I/O
I/O
I/O
tSOR
tCIR
tPD
tPD
08740G-20
PALCE29M16H-25 (Com’l)
2-339