AM188ES-40KCW Datasheet, PDF (75/102 Pages) Advanced Micro Devices – High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers

PRELIMINARY
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges
PSRAM Read Cycle (33 MHz and 40 MHz)
Parameter
No. Symbol
Description
General Timing Requirements
1
t_DVCL Data in Setup
2
t_CLDX Data in Hold^(b)
General Timing Responses
5
t_CLAV AD Address Valid Delay and BHE
7
t_CLDV Data Valid Delay
8
t_CHDX Status Hold Time
9
t_CHLH ALE Active Delay
10
t_LHLL ALE Width
11 t_CHLL ALE Inactive Delay
23 t_LHAV ALE High to Address Valid
80 t_CLCLX LCS Inactive Delay
81 t_CLCSL LCS Active Delay
84 t_LRLL LCS Precharge Pulse Width
Read Cycle Timing Responses
24 t_AZRL AD Address Float to RD Active
25 t_CLRL RD Active Delay
26 t_RLRH RD Pulse Width
27 t_CLRH RD Inactive Delay
28
t_RHLH RD Inactive to ALE High^(a)
59 t_RHDX RD High to Data Hold on AD
Bus^(b)
66 t_AVRL A Address Valid to RD Low
68 t_CHAV CLKOUTA High to A Address
Valid
33 MHz
Min
8
3
0
0
0
t_CLCL – 10 =20
10
0
0
t_CLCL + t_CLCH –3
0
0
2t_CLCL – 15 = 45
0
t_CLCH – 3
0
t_CLCL+ t_CHCL–3
0
Preliminary
40 MHz
Max
Min
5
2
15
0
15
0
0
15
t_CLCL – 5 =20
15
7.5
15
0
15
0
t_CLCL + t_CLCH –
1.25
0
15
0
2t_CLCL – 10 = 40
15
0
t_CLCH – 1.25
0
t_CLCL + t_CHCL–
1.25
15
0
Max
12
12
12
12
12
12
10
12
10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes:
All timing parameters are measured at 1.5 V with 50 pF loading on CLKOUTA, unless otherwise noted. All output test conditions
are with C_L =50 pF. For switching tests, V_IL=0.45 V and V_IH =2.4 V, except at X1 where V_IH =V_CC –0.5 V.
a Testing is performed with equal loading on referenced pins.
b If either spec 2 or spec 59 is met with respect to data hold time, the part will function correctly.
Am186/188ES and Am186/188ESLV Microcontrollers
75