AM188ES-40KCW Datasheet, PDF (12/102 Pages) Advanced Micro Devices – High Performance, 80C186-/80C188-Compatible and 80L186-/80L188-Compatible, 16-Bit Embedded Microcontrollers

PRELIMINARY
port operates independently and has the following
features:
n Full-duplex operation
n 7-bit, 8-bit, or 9-bit operation
n Even, odd, or no parity
n One stop bit
n Long or short break character recognition
n Parity error, framing error, overrun error, and break
character detection
n Configurable hardware handshaking with CTS,
RTS, ENRX, and RTR
n DMA to and from the serial ports
n Separate maskable interrupts for each port
n Multiprocessor 9-bit protocol
n Independent baud rates for each port
n Maximum baud rate of 1/16th of the CPU clock rate
n Double-buffered transmit and receive
n Programmable interrupt generation for transmit, re-
ceive, and/or error detection
DMA and the Serial Ports
The Am186ES and Am188ES microcontrollers can
DMA directly to and from the serial ports. DMA and
serial port transfer is accomplished by programming
the DMA controller to perform transfers between a data
source in memory or I/O space and a serial port
transmit or receive register. The two DMA channels
can support one serial port in full-duplex mode or two
serial ports in half-duplex mode.
Two Additional External Interrupts
Two new interrupts, INT5 and INT6, are multiplexed
with the DMA request signals, DRQ0 and DRQ1. If a
DMA channel is not enabled, or if it is not using external
synchronization, then the associated pin can be used
as an external interrupt. INT5 and INT6 can also be
used in conjunction with the DMA terminal count
interrupts.
Enhanced Watchdog Timer
The Am186ES and Am188ES microcontrollers provide
a true watchdog timer that can be configured to
generate either an NMI interrupt or a system reset
upon timeout. The watchdog timer supports up to a
1.67-second timeout period in a 40-MHz system.
After reset, the watchdog timer defaults to enabled and
can be modified or disabled only one time. If the timer
is not disabled, the application program must
periodically reset the timer by writing a specific key
sequence to the watchdog timer control register. If the
timer is not reset before it counts down, either an NMI
or a system reset is issued, depending on the
configuration of the timer.
Pulse Width Demodulation Option
The Am186ES and Am188ES microcontrollers provide
pulse width demodulation by adding a Schmitt trigger
buffer to the INT2 pin. If pulse width demodulation
mode is enabled, timer 0 and timer 1 are used to
determine the pulse width of the signal period.
Separate maskable interrupts are generated on the
rising and falling edge of the pulse input.
In pulse width demodulation mode, the external pins
INT4, TIMERIN0, and TIMERIN1 are available as
PIOs, but not as their normal functionality.
Data Strobe Bus Interface Option
The Am186ES and Am188ES microcontrollers provide
a truly asynchronous bus interface that allows the use
of 68K-type peripherals. This implementation
combines a new DS data strobe signal (multiplexed
with DEN) with a truly asynchronous ARDY ready input.
When DS is asserted, the data and address signals are
valid.
A chip-select signal, ARDY, DS, and other control
signals (RD/WR) can control the interface of 68K-type
external peripherals to the AD bus.
MCS0 Asserted for All MCS Option
When the MCS0-only mode is enabled in the
Am186ES and Am188ES microcontrollers, the entire
middle chip-select range is selected through MCS0.
The remaining MCS pins are available as PIOs or
alternate functions.
ARDY Functionality Change
In the Am186ES and Am188ES microcontrollers, the
ARDY signal is changed to allow both edges of ARDY
to be asynchronous to the clock.
On the Am186EM and Am188EM microcontrollers,
proper operation was not guaranteed if ARDY did not
meet the specification relative to the clock for all edges
except the falling edge of a normally-ready system
(relative to the rising edge of CLKOUTA).
To guarantee the number of wait states inserted,
ARDY or SRDY must be synchronized to CLKOUTA. If
the falling edge of ARDY is not synchronized to
CLKOUTA as specified, an additional clock period can
be added.
8-Bit and 16-Bit Bus Sizing Option
The Am186ES microcontroller allows switchable 8-bit
and 16-bit bus sizing based on chip selects for three
chip-select regions. The Am188ES microcontroller
supports only 8-bit data widths.
On the Am186ES microcontroller, the upper chip select
(UCS) region is always 16 bits, so memory used for
boot code at power-on reset must be 16-bit memory.
However, the LCS memory region, memory that is not
UCS or LCS (including memory mapped to MCS and
PCS), and I/O space can be independently configured
as 8-bit or 16-bit.
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Am186/188ES and Am186/188ESLV Microcontrollers