HC20K400 Datasheet, PDF (5/36 Pages) Altera Corporation – HardCopy APEX Device Family

...and More Features
■ Support for high-speed external memories, including double-data
rate (DDR), synchronous dynamic RAM (SDRAM), and
zero-bus-turnaround (ZBT) static RAM (SRAM)
■ 16 input and 16 output LVDS channels
■ Fast t_CO and t_SU times for complex logic
■ MultiVolt I/O support for 1.8-V, 2.5-V, and 3.3-V interfaces
■ Individual tri-state output enable control for each pin
■ Output slew-rate control to reduce switching noise
■ Support for advanced I/O standards, including LVDS, LVPECL,
PCI-X, AGP, CTT, SSTL-3 and SSTL-2, GTL+, and HSTL Class I
■ Supports hot-socketing operation
Table 7–2. HardCopy APEX Device Supply Voltages
Feature
Voltage
Internal supply voltage (V_CCINT)
MultiVolt I/O interface voltage levels (V_CCIO)
1.8 V
1.8 V, 2.5 V, 3.3 V, 5.0 V (1)
Note to Table 7–2:
(1) HardCopy APEX devices can be 5.0-V tolerant by using an external resistor.
HardCopy APEX device implementation features:
■ Customized interconnect for each design
■ HardCopy APEX devices preserve APEX 20K device MegaLAB
structure, LEs, ESBs, I/O element (IOE), PLLs, and LVDS circuitry
■ Up to four metal layers customizable for customer designs
■ Completely automated proprietary design migration flow
● Testability analysis and fix
● Automatic test pattern generation (ATPG)
● Automatic place and route
● Static timing analysis
● Static functional verification
● Physical verification
Altera Corporation
7–3
September 2008