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HC20K400 Datasheet, PDF (33/36 Pages) Altera Corporation – HardCopy APEX Device Family
Recommended Operating Conditions
Figure 10–2 shows the timing model for bidirectional I/O pin timing.
Figure 10–2. Synchronous Bidirectional Pin External Timing
Dedicated
Clock
OE Register
PRN
DQ
CLRN
Output IOE Register
PRN
DQ
t XZBIDIR
t ZXBIDIR
tOUTCOBIDIR
Bidirectional Pin
CLRN IOE Register
Input Register
PRN
DQ
tINSUBIDIR
tINHBIDIR
CLRN
Tables 10–21 and 10–22 describe HardCopy APEX device external timing
parameters.
Table 10–21. HardCopy APEX Device External Timing Parameters Note (1)
Symbol
tINSU
tINH
tOUTCO
tINSUPLL
tINHPLL
tOUTCOPLL
Clock Parameter
Setup time with global clock at IOE register
Hold time with global clock at IOE register
Clock-to-output delay with global clock at IOE output register
Setup time with PLL clock at IOE input register
Hold time with PLL clock at IOE input register
Clock-to-output delay with PLL clock at IOE output register
Conditions
C1 = 35 pF
C1 = 35 pF
Table 10–22. HardCopy APEX Device External Bidirectional Timing Parameters (Part 1 of 2) Note (1)
Symbol
tINSUBIDIR
tINHBI DIR
tOUTCOBIDIR
tX ZBI DIR
Parameter
Setup time for bidirectional pins with global clock at LAB-adjacent input
register
Hold time for bidirectional pins with global clock at LAB-adjacent input
register
Clock-to-output delay for bidirectional pins with global clock at IOE
register
Synchronous output enable register to output buffer disable delay
Condition
C1 = 35 pF
C1 = 35 pF
Altera Corporation
September 2008
10–13