HC20K400 Datasheet, PDF (34/36 Pages) Altera Corporation – HardCopy APEX Device Family

HardCopy Series Handbook, Volume 1
Table 10–22. HardCopy APEX Device External Bidirectional Timing Parameters (Part 2 of 2) Note (1)
Symbol
t_{ZXBI DIR}
t_INSUBIDIRPLL
t_{INHBI DIRPLL}
t_{OUTCOBIDIRPLL}
t_{X ZBI DIRPLL}
t_{ZXBI DIRPLL}
Parameter
Condition
Synchronous output enable register to output buffer enable delay
C1 = 35 pF
Setup time for bidirectional pins with PLL clock at LAB-adjacent input
register
Hold time for bidirectional pins with PLL clock at LAB-adjacent input
register
Clock-to-output delay for bidirectional pins with PLL clock at IOE register C1 = 35 pF
Synchronous output enable register to output buffer disable delay with
PLL
Synchronous output enable register to output buffer enable delay with
PLL
C1 = 35 pF
C1 = 35 pF
Note to Tables 10–21 and 10–22:
(1) These timing parameters are sample-tested only.
Tables 10–23 and 10–24 show the external timing parameters for
HC20K1500 devices.
Table 10–23. HC20K1500 External Timing Parameters Note (1)
Symbol
Min
Max
Unit
t_INSU
t_INH
t_OUTCO
t_INSUPLL
t_INHPLL
t_OUTCOPLL
2.0
ns
0.0
ns
2.0
5.0
ns
3.3
ns
0.0
ns
0.5
2.1
ns
Table 10–24. HC20K1500 External Bidirectional Timing Parameters
(Part 1 of 2) Note (1)
Symbol
t_INSUBIDIR
t_{INHBI DIR}
t_OUTCOBIDIR
t_{X ZBI DIR}
t_{ZXBI DIR}
t_INSUBIDIRPLL
Min
1.9
0.0
2.0
3.9
Max
Unit
ns
ns
5.0
ns
7.1
ns
7.1
ns
ns
10–14
Altera Corporation
September 2008