EP3C55F780I7 Datasheet, PDF (244/274 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Cyclone III device family

9–86
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Document Revision History
1 To allow remote system upgrade dedicated circuitry to reset the watchdog timer, you
must assert the RU_nRSTIMER signal active for a minimum of 250 ns. This is equivalent
to strobing the reset_timer input of the ALTREMOTE_UPDATE megafunction high
for a minimum of 250 ns.
The user watchdog timer is not enabled during the configuration cycle of the device.
Errors during configuration are detected by the CRC engine. Also, the timer is
disabled for factory configuration. Functional errors must not exist in the factory
configuration because it is stored and validated during production and is never
updated remotely.
1 By default, the user watchdog timer is disabled in factory configurations and enabled
in user-mode application configurations. If you do not want to use the watchdog
timer feature, disable this feature in the factory configuration.
Quartus II Software Support
Implementation in your design requires a remote system upgrade interface between
the Cyclone III device family logic array and the remote system upgrade circuitry. You
must also generate configuration files for production and remote programming of the
system configuration memory. The Quartus II software provides these features.
The two implementation options, the ALTREMOTE_UPDATE megafunction and the
remote system upgrade atom, are for the interface between the remote system
upgrade circuitry and the device logic array interface. Using the megafunction block
instead of creating your own logic saves design time and offers more efficient logic
synthesis and device implementation.
f For more information about the ALTREMOTE_UPDATE megafunction, refer to the
Remote Update Circuitry (ALTREMOTE_UPDATE) Megafunction User Guide.
Document Revision History
Table 9–32 lists the revision history for this document.
Table 9–32. Document Revision History (Part 1 of 2)
Date
August 2012
July 2012
December 2011
Version
Changes
2.2 Updated Micron P30 and P33 Parallel NOR flash devices.
2.1 Finalized Table 9–3, Table 9–13, and Table 9–14.
■ Updated “Configuration Features” on page 9–2, “Reset” on page 9–8,“AS Configuration
(Serial Configuration Devices)” on page 9–12, “Single-Device AS Configuration” on
page 9–13, “AP Configuration Supported Flash Memory” on page 9–24, “Single-Device
AP Configuration” on page 9–25, “JTAG Configuration” on page 9–48, and “User
Watchdog Timer” on page 9–85.
2.0 ^{■ Removed the “Overriding the Internal Oscillator” section from “JTAG Configuration”.}
■ Updated Figure 9–11, Figure 9–24, Figure 9–25, Figure 9–26, Figure 9–27, Figure 9–29,
Figure 9–30.
■ Updated Table 9–13, Table 9–18, and Table 9–22.
■ Replaced links to AN 386: Using the Parallel Flash Loader with the Quartus II Software
links to Parallel Flash Loader Megafunction User Guide.
Cyclone III Device Handbook
Volume 1
August 2012 Altera Corporation