EP3C55F780I7 Datasheet, PDF (116/274 Pages) Altera Corporation – This section provides a complete overview of all features relating to the Cyclone III device family

6–18
Chapter 6: I/O Features in the Cyclone III Device Family
I/O Banks
1 When VREF pins are used as regular I/Os, they have higher pin capacitance than
regular user I/O pins. This has an impact on the timing if the pins are used as inputs
and outputs.
f For more information about VREF pin capacitance, refer to the pin capacitance section
in the Cyclone III Device Data Sheet and Cyclone III LS Device Data Sheet chapters.
f For more information about how to identify V_REF groups, refer to the Cyclone III
Device Family Pin-Out files or the Quartus II Pin Planner tool.
Table 6–6 lists the number of VREF pins in each I/O bank for Cyclone III and
Cyclone III LS devices.
Table 6–6. Number of VREF Pins Per I/O Banks for Cyclone III and Cyclone III LS Devices (Part 1 of 2)
Family
Device
EP3C5
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
EP3C120
I/O Banks
Package Pin Count
1
2
3
4
5
6
7
8
EQFP
144
1
1
1
1
1
1
1
1
MBGA
164
1
1
1
1
1
1
1
1
FBGA
256
1
1
1
1
1
1
1
1
EQFP
144
1
1
1
1
1
1
1
1
MBGA
164
1
1
1
1
1
1
1
1
FBGA
256
1
1
1
1
1
1
1
1
EQFP
144
2
2
2
2
2
2
2
2
MBGA
164
2
2
2
2
2
2
2
2
PQFP
240
2
2
2
2
2
2
2
2
FBGA
256
2
2
2
2
2
2
2
2
FBGA
484
2
2
2
2
2
2
2
2
EQFP
144
1
1
1
1
1
1
1
1
PQFP
240
1
1
1
1
1
1
1
1
FBGA
256
1
1
1
1
1
1
1
1
FBGA
324
1
1
1
1
1
1
1
1
PQFP
240
4
4
4
4
4
4
4
4
FBGA
324
4
4
4
4
4
4
4
4
FBGA
484
4
4
4
4
4
4
4
4
FBGA
780
4
4
4
4
4
4
4
4
FBGA
484
2
2
2
2
2
2
2
2
FBGA
780
2
2
2
2
2
2
2
2
FBGA
484
3
3
3
3
3
3
3
3
FBGA
780
3
3
3
3
3
3
3
3
FBGA
484
3
3
3
3
3
3
3
3
FBGA
780
3
3
3
3
3
3
3
3
Cyclone III Device Handbook
Volume 1
July 2012 Altera Corporation