EP2C8Q208C6 Datasheet, PDF (151/168 Pages) Altera Corporation – Section I. Cyclone II Device Family Data Sheet

DC Characteristics and Timing Specifications
Tables 5–50 and 5–51 show the LVDS timing budget for Cyclone II
devices. Cyclone II devices support LVDS receivers at data rates up to
805 Mbps, and LVDS transmitters at data rates up to 640 Mbps.
Table 5–50. LVDS Transmitter Timing Specification (Part 1 of 2)
–6 Speed Grade
–7 Speed Grade
–8 Speed Grade
Symbol Conditions
Min
Typ
Max
(1)
Max
(2)
Min
Typ
Max
(1)
Max
(2)
Min
Typ
Max
(1)
Max
(2)
Unit
f_{H S C L K}
×10
(input
clock
×8
fre-
quency)
×7
10 — 320 320 10 — 275 320 10 — 155.5 320 MHz
(4) (6)
10 — 320 320 10 — 275 320 10 — 155.5 320 MHz
(4) (6)
10 — 320 320 10 — 275 320 10 — 155.5 320 MHz
(4) (6)
×4
10 — 320 320 10 — 275 320 10 — 155.5 320 MHz
(4) (6)
×2
10 — 320 320 10 — 275 320 10 — 155.5 320 MHz
(4) (6)
×1
10 — 402.5 402.5 10 — 402.5 402.5 10 — _{402.5 402.5} MHz
(8) (8)
HSIODR ×10
100 — 640 640 100 — 550 640 100 — _{311 550} Mbps
(5) (7)
×8
80 — 640 640 80 — 550 640 80 — _{311 550} Mbps
(5) (7)
×7
70 — 640 640 70 — 550 640 70 — _{311 550} Mbps
(5) (7)
×4
40 — 640 640 40 — 550 640 40 — _{311 550} Mbps
(5) (7)
×2
20 — 640 640 20 — 550 640 20 — _{311 550} Mbps
(5) (7)
×1
10 — 402.5 402.5 10 — 402.5 402.5 10 — _{402.5 402.5} Mbps
(9) (9)
t_{D U T Y}
—
45 — 55 — 45 — 55 — 45 — 55 — %
—
— — — 160 — — — 312.5 — — — 363.6 ps
TCCS
(3)
—
——
200
——
200
——
200
ps
Output
—
——
500
——
500
——
550 (10)
ps
jitter
(peak to
peak)
t_{R I S E}
20–80% 150 200
250
150 200
250
150 200
250 (11)
ps
Altera Corporation
February 2008
5–61
Cyclone II Device Handbook, Volume 1