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EP2C8Q208C6 Datasheet, PDF (119/168 Pages) Altera Corporation – Section I. Cyclone II Device Family Data Sheet | |||
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DC Characteristics and Timing Specifications
EP2C70 Clock Timing Parameters
Tables 5â33 and 5â34 show the clock timing parameters for EP2C70
devices.
Table 5â33. EP2C70 Column Pins Global Clock Timing Parameters
Parameter
tC I N
tC O U T
tP L L C I N
tP L L C O U T
Fast Corner
Industrial Commercial
â6 Speed
Grade
â7 Speed
Grade
â8 Speed
Grade
Unit
1.575
1.651
2.914
3.105
3.174
ns
1.589
1.666
2.948
3.137
3.203
ns
â0.149
â0.158
0.27
0.268
0.089
ns
â0.135
â0.143
0.304
0.3
0.118
ns
Table 5â34. EP2C70 Row Pins Global Clock Timing Parameters
Parameter
tC I N
tC O U T
tP L L C I N
tP L L C O U T
Fast Corner
Industrial
1.463
1.465
â0.261
â0.259
Commercial
1.533
1.535
â0.276
â0.274
â6 Speed
Grade
2.753
2.769
0.109
0.125
â7 Speed
Grade
2.927
2.940
0.09
0.103
â8 Speed
Grade
Unit
3.010
ns
3.018
ns
â0.075
ns
â0.067
ns
Clock Network Skew Adders
Table 5â35 shows the clock network specifications.
Table 5â35. Clock Network Specifications
Name
Clock skew adder
EP2C5/A, EP2C8/A (1)
Clock skew adder
EP2C15A, EP2C20/A,
EP2C35, EP2C50,
EP2C70 (1)
Description
Max Unit
Inter-clock network, same bank
±88 ps
Inter-clock network, same side and ±88 ps
entire chip
Inter-clock network, same bank
±118 ps
Inter-clock network, same side and ±138 ps
entire chip
Note to Table 5â35:
(1) This is in addition to intra-clock network skew, which is modeled in the
Quartus II software.
Altera Corporation
February 2008
5â29
Cyclone II Device Handbook, Volume 1
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