AK4637 Datasheet, PDF (62/96 Pages) Asahi Kasei Microsystems – 24bit Mono CODEC with MIC - SPK-AMP

[AK4637]
■ Monaural Line Output (AOUT pin, LOSEL bit = “1”)
When LOSEL bit is set to “1”, the output signal of DAC is output in single-ended format via AOUT pin. The
monaural line output is valid at AVDD = 2.8~3.6V. When DACL bit is “0” at LOSEL = PMSL = SLPSN bits
= “1”, output signal is muted and AOUT pin output common voltage. The load impedance is 10k (min.).
When PMSL bit = “0” at LOSEL = SLPSN bits = “1”, the monaural line output enters power-down mode
and the output is pulled-down to VSS1 by 100k(typ). Pop noise at power-up/down can be reduced by
changing PMSL bit when SLPSN bit = “0” at LOSEL bit = “1”. In this case, output signal line should be
pulled-down to VSS1 by 22k after AC coupled as Figure 52. Rise/Fall time is 300ms (max) when C=1F
and R_L=10k. When LOSEL = PMSL = SLPSN bits = “1”, monaural line output is in normal operation.
LVCM1-0 bits set the gain of monaural line output.
DAC
“DACL bit” “LVCM1-0 bits”
AOUT pin
“BEEPS bit”
BEEP
Figure 51. Monaural Line Output
PMSL bit
0
1
SLPSN bit
Mode
AOUT pin
0
Power Down
Fall-down to VSS1
1
Power Down
Pull-down to VSS1
0
Power Save
Rise up to Common Voltage
1
Normal Operation
Normal Operation
Table 49. Monaural Line Output Mode Select
(default)
LVCM1-0 bits
00
01
10
11
AVDD
Gain Common Voltage (typ)
2.8 ~ 3.6V
0dB
1.3V
3.0 ~ 3.6V
+2dB
1.5V
(default)
2.8 ~ 3.6V
+2dB
1.3V
3.0 ~ 3.6V
+4dB
1.5V
Table 50. Monaural Lineout Volume Setting
1F
AOUT
220
External
Input
22k
Note 38. If the value of 22k resistance at pop noise reduction circuit is increased, the power-up time of
Monaural line output is increased but the pop noise level is not decreased. Do not use a resistor
less than 22k at the pop noise reduction circuit since the line output drivability is minimum 10k.
Figure 52. External Circuit for Monaural Line Output (in case of using a Pop Noise Reduction Circuit)
015010680-E-00
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2015/09