AK4637 Datasheet, PDF (16/96 Pages) Asahi Kasei Microsystems – 24bit Mono CODEC with MIC - SPK-AMP

■ Switching Characteristics
[AK4637]
(Ta=25C; fs=48kHz; C_L=20pF; AVDD=2.85.5V, DVDD=1.6~1.98V, TVDD=1.6 or (DVDD-0.2)3.6V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
PLL Master Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency PLL3-0 bits = “0100” fCLK
-
11.2896
-
MHz
PLL3-0 bits = “0101” fCLK
-
12.288
-
MHz
PLL3-0 bits = “0110” fCLK
-
12
-
MHz
PLL3-0 bits = “0111” fCLK
-
24
-
MHz
PLL3-0 bits = “1100” fCLK
-
13.5
-
MHz
PLL3-0 bits = “1101” fCLK
-
27
-
MHz
Pulse Width Low
tCLKL 0.4/fCLK
-
-
s
Pulse Width High
tCLKH 0.4/fCLK
-
-
s
FCK Output Timing
Frequency
fs
-
Table 8
-
Hz
DSP Mode: Pulse Width High
tFCKH
-
1/fBCK
-
ns
Except DSP Mode: Duty Cycle
Duty
-
50
-
%
BICK Output Timing
Frequency BCKO1-0 bit = “00” fBCK
-
16fs
-
Hz
BCKO1-0 bit = “01” fBCK
-
32fs
-
Hz
BCKO1-0 bit = “10” fBCK
-
64fs
-
Hz
Duty Cycle
dBCK
-
50
-
%
PLL Slave Mode (PLL Reference Clock = BICK pin)
FCK Input Timing
Frequency PLL3-0 bits = “0001” fs
-
fBCK/16
-
Hz
PLL3-0 bits = “0010” fs
-
fBCK/32
-
Hz
PLL3-0 bits = “0011” fs
-
fBCK/64
-
Hz
DSP Mode: Pulse Width High
tFCKH 1/fBCK60
-
1/fs1/fBCK ns
Except DSP Mode: Duty Cycle
Duty
45
-
55
%
BICK Input Timing
Frequency PLL3-0 bits = “0001” fBCK
0.128
-
0.768
MHz
PLL3-0 bits = “0010” fBCK
0.256
-
1.536
MHz
PLL3-0 bits = “0011” fBCK
0.512
-
3.072
MHz
Pulse Width Low
tBCKL 0.4/fBCK
-
-
s
Pulse Width High
tBCKH 0.4/fBCK
-
-
s
015010680-E-00
- 16 -
2015/09