AK4118A Datasheet, PDF (6/56 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio I/F Transceiver

[AK4118A]
PIN/FUNCTION (Continued)
No. Pin Name
I/O
Function
25 SDTO
O Audio Serial Data Output Pin
26 BICK
I/O Audio Serial Data Clock Pin
27 MCKO2
O Master Clock Output 2 Pin
28 DAUX
I Auxiliary Audio Data Input Pin
29 XTO
O X'tal Output Pin
30 XTI
I X'tal Input Pin
Power-Down Mode Pin
31 PDN
I
When “L”, the AK4118A is powered-down, and all output pins go to “L” and
registers are initialized.
CM0
I Master Clock Operation Mode 1 Pin in Parallel Mode
32 CDTO
O Control Data Input Pin in Serial Mode, IIC= “L”.
CAD1
I Control Data Pin in Serial Mode, IIC= “H”.
CM1
I Master Clock Operation Mode 1 Pin in Parallel Mode
33 CDTI
I Control Data Input Pin in Serial Mode, IIC= “L”.
SDA
I/O Control Data Pin in Serial Mode, IIC= “H”.
OCKS1
I Output Clock Select 1 Pin in Parallel Mode
34 CCLK
I Control Data Clock Pin in Serial Mode, IIC= “L”
SCL
I Control Data Clock Pin in Serial Mode, IIC= “H”
OCKS0
I Output Clock Select 0 Pin in Parallel Mode
35 CSN
I Chip Select Pin in Serial Mode, IIC=”L”.
CAD0
I Chip Address 0 Pin in Serial Mode, IIC= “H”.
36 INT0
O Interrupt 0 Pin
37 INT1
O Interrupt 1 Pin
38 AVDD
I Analog Power Supply Pin, 2.7V ~ 3.6V
39 R
-
External Resistor Pin
10kΩ +/-1% resistor should be connected to VSS3 externally.
40 VCOM
-
Common Voltage Output Pin
0.47µF capacitor should be connected to VSS3 externally.
41 VSS3
I Ground Pin
42 RX0
I
Receiver Channel 0 Pin (Internal biased pin)
This channel is default in serial mode.
43 NC
I
No Connect
No internal bonding. This pin should be connected to VSS3.
44 RX1
I Receiver Channel 1 Pin (Internal biased pin)
45 TEST1
I
TEST 1 pin.
This pin should be connected to VSS3.
46 RX2
I Receiver Channel 2 Pin (Internal biased pin)
47 VSS4
I Ground Pin
48 RX3
I Receiver Channel 3 Pin (Internal biased pin)
Note 1. All input pins except internal biased pins (RX0-7 pins)should not be left floating.
MS1130-E-02
-6-
2009/12