AK4118A Datasheet, PDF (35/56 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio I/F Transceiver

[AK4118A]
■ Serial Control Interface
(1). 4-wire serial control mode (IIC pin= “L”)
The internal registers may be either written or read by the 4-wire µP interface pins: CSN, CCLK, CDTI & CDTO. The
data on this interface consists of Chip address (1bit, C1 is fixed to “0”), Read/Write (1bit), Register address (MSB first,
5bits) and Control data (MSB first, 8bits). Address and data is clocked in on the rising edge of CCLK and data is clocked
out on the falling edge. For write operations, data is latched after the 16th rising edge of CCLK, after a high-to-low
transition of CSN. For read operations, the CDTO output goes high impedance after a low-to-high transition of CSN. The
maximum speed of CCLK is 5MHz. The PDN pin= “L” resets the registers to their default values. When the state of PSN
pin is changed, the AK4118A should be reset by the PDN pin= “L”.
CSN
CCLK
CDTI
WRITE
CDTO
READ
CDTI
CDTO
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C1 A5 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Hi-Z
C1 A5 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
Hi-Z
Hi-Z
D7 D6 D5 D4 D3 D2 D1 D0
C1:
R/W:
A5-A0:
D7-D0:
Chip Address (Fixed to “0”)
READ/WRITE (0:READ, 1:WRITE)
Register Address
Control Data
Figure 34. 4-wire Serial Control I/F Timing
MS1130-E-02
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2009/12