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AK4118A Datasheet, PDF (36/56 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio I/F Transceiver | |||
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(2). I2C bus control mode (IIC pin= âHâ)
The AK4118A supports High speed mode I2C-bus (max: 400kHz).
[AK4118A]
(2)-1. Data transfer
In order to access any IC devices on the I²C BUS, input a start condition first, followed by a single Slave address that
includes the Device Address. IC devices on the BUS compare this Slave address with their own addresses and the IC
device that has identical address with the Slave-address generates an acknowledgement. An IC device with the identical
address executes either a read or write operation. After the command execution, input Stop condition.
(2)-1-1. Data Change
Change the data on the SDA line while SCL line is âLâ. SDA line condition must be stable and fixed while the clock is
âHâ. Change the Data line condition between âHâ and âLâ only when the clock signal on the SCL line is âLâ. Change the
SDA line condition while SCL line is âHâ only when the start condition or stop condition is input.
SCL
SDA
DATA LINE
STABLE :
DATA VALID
CHANGE
OF DATA
ALLOWED
Figure 35. Data Transfer
(2)-1-2. START and STOP condition
Start condition is generated by the transition of âHâ to âLâ on the SDA line while the SCL line is âHâ. All instructions are
initiated by Start condition. Stop condition is generated by the transition of âLâ to âHâ on SDA line while SCL line is
âHâ. All instructions end by Stop condition.
SCL
SDA
START CONDITION
STOP CONDITION
Figure 36. START and STOP condition
MS1130-E-02
- 36 -
2009/12
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