AK4118A Datasheet, PDF (48/56 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio I/F Transceiver

[AK4118A]
Addr
Register Name
21H GPDR
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
IO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0
R/W R/W R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
0
0
IO7-0: GPIO pin Input/Output Setting
0: Input (default)
1: Output
Addr
Register Name
22H GPSCR
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
SC7 SC6 SC5 SC4 SC3 SC2 SC1 SC0
R/W R/W R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
0
0
SC7-0: GPIO pin Output Level Setting
0: “L” (default)
1: “H”
This is effective only when the pin setting is in output mode (21H: GPDR= “1”). Actual pin
level can be read by GPLR register.
Addr
Register Name
23H GPLR
R/W
Default
D7
GPL7
RD
0
D6
GPL6
RD
0
D5
GPL5
RD
0
D4
GPL4
RD
0
D3
GPL3
RD
0
D2
GPL2
RD
0
D1
GPL1
RD
0
D0
GPL0
RD
0
GPD7-0: GPIO pin Input Level Read
GLP7-0 bits are read only register that can read the input signal level of corresponding GPIO pins
(GP7-0 pins). GPIO mode is enabled GP2-7 pins can read the input signal level when GPE bit = “1”
and BCU bit = TX1E bit = TX0E bit = “0”. When VINE bit = “0”, GPIO mode of the GP1 pin is
enabled and GPLO bit can read the input signal level. GPL1 bit can always read the input signal
level of the GP1 pin. GPL2-7 bits and GPL0 bit are always “0” when GPIO mode is disable.
MS1130-E-02
- 48 -
2009/12