AK4118A Datasheet, PDF (49/56 Pages) Asahi Kasei Microsystems – High Feature 192kHz 24bit Digital Audio I/F Transceiver

[AK4118A]
DAT Mask & DTS Detect
Addr
Register Name
D7
D6
D5
D4
D3
D2
D1
D0
24H DAT Mask & DTS Detect XMCK DIV MRDT1 MRDT0 MSTC1 MSTC0 MDAT1 MDAT0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
Default
0
0
1
1
1
1
1
1
MDAT0: Mask enable for DAT bit
0: Mask disable
1: Mask enable (default)
When the Mask is enabled “1”, DAT state is not reflected on to the INT0 pin.
MDAT1: Mask enable for DAT bit
0: Mask disable
1: Mask enable (default)
When the Mask is enabled “1”, DAT state is not reflected on to the INT1 pin.
MSTC0: Mask enable for STC bit
0: Disable
1: Enable (default)
When the Mask is enabled “1”, STC state is not reflected on to the INT0 pin.
MSTC1: Mask enable for STC bit
0: Disable
1: Enable (default)
When the Mask is enabled “1”, STC state is not reflected on to the INT1 pin.
MRDT0: Mask enable for RX Detect
0: Disable
1: Enable (default)
When the Mask is enabled “1”, RX input detection resault is not reflected on to the INT0 pin.
MRDT1: Mask enable for RX Detect
0: Disable
1: Enable (default)
When the Mask is enabled “1”, RX input detection resault is not reflected on to the INT1 pin.
DIV: MCKO2 Frequency Dividing Ratio in X’tal mode (Table 4)
0: x1 (default)
1: x 1/2
XMCK: MCKO2 Output Setting (Table 4)
0: Setting by CM1-0 bits and OCKS1-0 bits (default)
1: Fixed in X’tal mode
RX Detect
Addr
Register Name
25H RX Detect
R/W
Default
D7
RXDE7
RD
0
D6
RXDE6
RD
0
D5
RXDE5
RD
0
D4
RXDE4
RD
0
D3
RXDE3
RD
0
D2
RXDE2
RD
0
D1
RXDE1
RD
0
D0
RXDE0
RD
0
RXDE7-0: The RX pin Input Detect
0: No Detect
1: Detect
When the RXDETE bit is set to “0”, the input detection function is disabled and the register is fixed to “0”. When the
unused RX pin is open, the AK4118A may not be able to detect the input signal correctly. The unused RX pin should be
connected to the GND.
MS1130-E-02
- 49 -
2009/12