AK5701 Datasheet, PDF (59/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
3. PLLεϨʔϒϞʔυ(MCKI pin)ͷ৔߹
PMPLL bit
(Addr:11H, D0)
MCKO bit
(Addr:16H, D2)
External MCKI
(1)
(2)
(3)
Input
Example
Audio I/F Format: I2S
PLL Reference clock: MCKI=11.2896MHz
EXBCLK frequency: 64fs
Sampling Frequency: 44.1kHz
(1) Addr:11H, Data:10H
(2) Addr:16H, Data:00H
(3) Stop the external clocks
Figure 55. Clock Stopping Sequence (3)
<खॱྫ>
(1) PLLͷύϫʔμ΢ϯ: PMPLL bit = “1” → “0”
(2) MCKOग़ྗͷఀࢭ: MCKO bit = “1” → “0”
(3) ֎෦ΫϩοΫΛࢭΊͯԼ͍͞ɻ
4. ֎෦ΫϩοΫϞʔυͷ৔߹(εϨʔϒϞʔυ)
External MCKI
EXBCLK
EXLRCK
(1)
Input
(1)
Input
(1)
Input
Example
Audio I/F Format :I2S
Input MCKI frequency:256fs
Sampling Frequency:44.1kHz
(1) Stop the external clocks
Figure 56. Clock Stopping Sequence (4)
<खॱྫ>
(1) ֎෦ΫϩοΫΛࢭΊͯԼ͍͞ɻ
* όΠύεϞʔυ΋ಉ༷ͷखॱͰ͢ɻ
5. ֎෦ΫϩοΫϞʔυͷ৔߹(ϚελϞʔυ)
External MCKI
(1)
Input
BCLK
LRCK
Output
Output
"H" or "L"
"H" or "L"
Example
Audio I/F Format :I2S
Input MCKI frequency:256fs
Sampling Frequency:44.1kHz
(1) Stop MCKI
Figure 57. Clock Stopping Sequence (5)
<खॱྫ>
(1) MCKIΛࢭΊͯԼ͍͞ɻBCLK͓ΑͼLRCK͸ “H”·ͨ͸ “L”ݻʹఆ͞Ε·͢ɻ
MS0404-J-00
- 59 -
2005/08