AK5701 Datasheet, PDF (29/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
„ ΦʔσΟΦΠϯλϑΣʔεϑΥʔϚοτ
4छྨͷσʔλϑΥʔϚοτ(Table 15)͕DIF1-0 bitͰબ୒Ͱ͖·͢ɻશϞʔυͱ΋MSBϑΝʔετɺ2’sίϯϓ
ϦϝϯτͷσʔλϑΥʔϚοτͰ͢ɻΦʔσΟΦΠϯλϑΣʔε͸ϚελϞʔυͱεϨʔϒϞʔυʹରԠ͠
·͢ɻͨͩ͠ɺDSP Mode 1͸PLL Master ModeͷΈରԠ͠·͢ɻϚελϞʔυͰ͸LRCK, BCLK, SDTOΛ࢖
༻͠ɺεϨʔϒϞʔυͰ͸EXLRCK, EXBCLK, SDTOΛ࢖༻͠·͢ɻMode 2ͱMode 3Ͱ͸SDTO͸
BCLK/EXBCLKͷ “↓”Ͱग़ྗ͞Ε·͢ɻ
Mode
0
1
2
3
DIF1 bit
0
0
1
1
DIF0 bit
0
1
0
1
SDTO
BCLK, EXBCLK
DSP Mode 0
32fs
DSP Mode 1
≥ 32fs
લ٧Ί
I²S׵ޓ
≥ 32fs
≥ 32fs
Table 15. Audio Interface Format
Figure
See Table 16
Figure 34
Figure 35 Default
Mode 0, 1 (DSPϞʔυ0, 1)Ͱ͸ɺBCKP, MSBS bitʹΑΓɺΦʔσΟΦI/FͷλΠϛϯάΛมߋ͢Δ͜ͱ͕Ͱ͖
·͢ɻ
BCKP bit = “0”ͷ৔߹ɺSDTO͸BCLK/EXBCLKͷ “↑”Ͱग़ྗ͞Ε·͢ɻ
BCKP bit = “1”ͷ৔߹ɺSDTO͸BCLK/EXBCLKͷ “↓”Ͱग़ྗ͞Ε·͢ɻ
MSBS bit͸ɺMSBσʔλͷҐஔΛBCLK/EXBCLKͷ൒पظ෼γϑτ͢Δ͜ͱ͕Ͱ͖·͢ɻ
DIF1
0
0
DIF0
0
1
MSBS
0
0
1
1
0
0
1
1
BCKP
Audio Interface Format
0
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
BCLK/EXBCLK “↑”Ͱग़ྗ͞Ε·͢ɻ(Figure 26)
1
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
BCLK/EXBCLK “↓”Ͱग़ྗ͞Ε·͢ɻ(Figure 27)
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
0 BCLK/EXBCLK “↓” ͷ࣍ͷBCLK/EXBCLK “↑”Ͱग़ྗ͞Ε·
͢ɻ(Figure 28)
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
1 BCLK/EXBCLK “↑” ͷ࣍ͷBCLK/EXBCLK “↓”Ͱग़ྗ͞Ε·
͢ɻ(Figure 29)
0
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
BCLK/EXBCLK “↑”Ͱग़ྗ͞Ε·͢ɻ(Figure 30)
1
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
BCLK/EXBCLK “↓”Ͱग़ྗ͞Ε·͢ɻ(Figure 31)
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
0 BCLK/EXBCLK “↓” ͷ࣍ͷBCLK/EXBCLK “↑”Ͱग़ྗ͞Ε·
͢ɻ(Figure 32)
SDTOͷMSBσʔλ͸LRCK/EXLRCK “↑”ޙͷ1ճ໨ͷ
1 BCLK/EXBCLK “↑” ͷ࣍ͷBCLK/EXBCLK “↓”Ͱग़ྗ͞Ε·
͢ɻ(Figure 33)
Table 16. Audio Interface Format in Mode 0, 1
Default
ADCΑΓग़ྗ͞Εͨ16bitσʔλΛ8bitσʔλ΁ม͠׵อଘ͢Δ৔߹ɺ16bitσʔλΛ୯७ʹ੾ΓࣺͯΔͱɺ16bit
σʔλͷ “−1”͸8bitσʔλͰ “−1”ʹม͞׵Ε·͢ɻ͜ͷ8bitσʔλͷ “−1”ΛDACʹͯ࠶ੜ͢ΔͨΊ16bitσʔ
λʹ࠶ม͢׵Δͱ “–256”ͱͳΓେ͖ͳϊΠζʹͳΓ·͢ɻ8bitσʔλ΁ม͢׵Δલʹɺ16bitσʔλʹΦϑη
οτ(128)ΛՃࢉ͢Δ͜ͱΛਪ঑͠·͢ɻ
MS0404-J-00
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2005/08