AK5701 Datasheet, PDF (11/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
Parameter
Symbol
min
typ
max
Control Interface Timing (CSP pin = “L”)
CCLK Period
tCCK
142
-
-
CCLK Pulse Width Low
tCCKL
56
-
-
Pulse Width High
tCCKH
56
-
-
CDTI Setup Time
tCDS
28
-
-
CDTI Hold Time
tCDH
28
-
-
CSN “H” Time
tCSW
150
-
-
CSN “↓” to CCLK “↑”
tCSS
50
-
-
CCLK “↑” to CSN “↑”
tCSH
50
-
-
Control Interface Timing (CSP pin = “H”)
CCLK Period
tCCK
142
-
-
CCLK Pulse Width Low
tCCKL
56
-
-
Pulse Width High
tCCKH
56
-
-
CDTI Setup Time
tCDS
28
-
-
CDTI Hold Time
tCDH
28
-
-
CSN “L” Time
tCSW
150
-
-
CSN “↑” to CCLK “↑”
tCSS
50
-
-
CCLK “↑” to CSN “↓”
tCSH
50
-
-
Power-down & Reset Timing
PDN Pulse Width (Note 22)
tPD
150
-
-
PMADL or PMADR “↑” to SDTO valid (Note 23)
HPF1-0 bits = “00”
tPDV
-
3088
-
HPF1-0 bits = “01”
tPDV
-
1552
-
HPF1-0 bits = “10”
tPDV
-
784
-
Note 22. AK5701͸PDN pin = “L”ͰϦηοτ͞Ε·͢ɻ
Note 23. PMADL bit·ͨ͸PMADR bitΛ্ཱ͔ͪ͛ͯΒͷLRCKΫϩοΫͷ “↑”ͷճ਺Ͱ͢ɻ
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1/fs
1/fs
1/fs
MS0404-J-00
- 11 -
2005/08