AK5701 Datasheet, PDF (44/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
Addr
15H
Register Name
fs Select
Default
D7
D6
D5
D4
D3
D2
D1
D0
HPF1
HPF0 BCKO1 BCKO0 FS3
FS2
FS1
FS0
0
0
0
1
1
1
1
1
FS3-0: αϯϓϦϯάप೾਺(See Table 5 and Table 6)ͼٴMCKIप೾਺ͷઃఆ(See Table 11)
Default: “1111” (44.1kHz)
PLLϞʔυ࣌͸αϯϓϦϯάप೾਺ͷઃఆΛߦ͍ɺEXTϞʔυ࣌͸MCKIͷೖྗप೾਺Λઃఆ͠·
͢ɻ
BCKO1-0: ϚελϞʔυ࣌ͷBCLKग़ྗप೾਺ͷઃఆ (See Table 10)
Default: “01” (32fs)
HPF1-0: ΦϑηοτΩϟϯηϧHPFΧοτΦϑप೾਺͓ΑͼADCظॳԽαΠΫϧઃఆ(Table 18, Table 30)
Default: “00” (fc=3.4Hz@fs=44.1kHz, Init Cycle=3088/fs)
Addr
16H
Register Name
Clock Output Select
Default
D7
D6
D5
0
0
0
0
0
0
PS1-0: MCKOप೾਺ͷઃఆ(Table 9)
Default: “00”(256fs)
MCKO: MCKO৴߸ͷ੍ޚ
0: Disable: MCKO pin = “L” (Default)
1: Enable: Output frequency is selected by PS1-0 bits.
THR: ύΠύεϞʔυઃఆ(Table 14)
0: OFF (Default)
1: ON
D4
D3
D2
D1
D0
0
THR MCKO PS1
PS0
0
0
0
0
0
Addr
17H
Register Name
Volume Control
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
IVOLC
0
0
0
0
0
0
0
1
IVOLC: IVOLͷίϯτϩʔϧ
0: Independent
1: Dependent (Default)
IVOLC bit = “1”ͷͱ͖ɺIVL7-0 bitͰ྆νϟωϧͷIVOL͕มԽ͠·͢ɻୠ͠ɺIVR7-0 bitʹIVL7-0 bit
ͷ஋͸ॻ͖ࠐ·Ε·ͤΜɻ
Addr
18H
19H
Register Name
Lch Input Volume Control
Rch Input Volume Control
Default
D7
IVL7
IVR7
1
D6
IVL6
IVR6
0
D5
IVL5
IVR5
0
D4
IVL4
IVR4
1
D3
IVL3
IVR3
0
D2
IVL2
IVR2
0
IVL7-0, IVR7-0: ೖྗσΟδλϧϘϦϡʔϜ; 0.375dB step, 242 Level (Table 29)
Default: “91H” (0dB)
D1
IVL1
IVR1
0
D0
IVL0
IVR0
1
MS0404-J-00
- 44 -
2005/08