AK5701 Datasheet, PDF (42/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
„ ৄࡉઆ໌
Addr
10H
Register Name
Power Management
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
PMVCM PMADR PMADL
0
0
0
0
0
0
0
0
PMADL: MIC-Amp Lch, ADC LchͷύϫʔϚωδϝϯτ
0: Power down (Default)
1: Power up
PMADR: MIC-Amp Rch, ADC RchͷύϫʔϚωδϝϯτ
0: Power down (Default)
1: Power up
PMADL·ͨ͸PMADR bitΛ “0”͔Β “1”ʹมߋ͢ΔͱɺॳظԽαΠΫϧ(3088/fs=70.0ms@fs=
44.1kHz, HPF1-0 bits = “00”)͕։࢝͞Ε·͢ɻॳظԽαΠΫϧऴྃޙɺADC͸σʔλΛग़ྗ͠·͢ɻ
PMVCM: VCOMͷύϫʔϚωδϝϯτ
0: Power down (Default)
1: Power up
֤ϒϩοΫΛಈ࡞ͤ͞Δ৔߹͸ɺඞͣPMVCM bitΛ“1”ʹ͠ͳ͚Ε͹ͳΓ·ͤΜɻPMVCM bitʹର
ͯ͠“0”Λॻ͖ࠐΉ͜ͱ͕Ͱ͖Δͷ͸ɺPMADL, PMADR, PMPLL, PMMP, MCKO bitsΛ“0”ʹ͢Δ࣌
͚ͩͰ͢ɻ
͜ͷΞυϨεͷϏοτΛON/OFF (“1”/“0”)͢Δ͜ͱͰ෦෼తʹύϫʔμ΢ϯ͢Δ͜ͱ͕Ͱ͖·͢ɻ·ͨɺ
PDN pinΛ“L”ʹ͢Δ͜ͱͰɺϨδελͷ಺༰ʹؔ܎ͳ͘ɺશճ࿏ΛҰ౓ʹύϫʔμ΢ϯ͢Δ͜ͱ͕Ͱ͖·
͢ɻ͜ͷͱ͖Ϩδελ஋͸ॳظԽ͞Ε·͢ɻ
·ͨɺPMVCM, PMADL, PMADR, PMPLL, MCKO bitsΛ͢΂ͯ“0”ʹ͢Δ͜ͱͰɺશճ࿏ΛҰ౓ʹύϫʔμ
΢ϯ͢Δ͜ͱ͕Ͱ͖·͢ɻ͜ͷͱ͖Ϩδελͷ಺༰͸อ࣋͞Ε͍ͯ·͢ɻফඅిྲྀ͸20µA(typ)ͳͷͰɺ
׬શʹγϟοτμ΢ϯ(typ. 1µA)͢Δʹ͸PDN pin = “L”ͱͯ͠Լ͍͞ɻ
ADCΛ࢖༻͠ͳ͍৔߹ɺΫϩοΫΛ͢څڙΔඞཁ͸͋Γ·ͤΜɻADCΛ࢖༻͢Δ৔߹͸ΫϩοΫΛڅڙ
ͯ͠Լ͍͞ɻ
Addr
11H
Register Name
PLL Control
Default
D7
D6
D5
0
0
PLL3
0
0
1
PMPLL: PLLͷύϫʔϚωδϝϯτ
0: EXT Mode and Power Down (Default)
1: PLL Mode and Power up
M/S: Master / Slave Modeͷબ୒
0: Slave Mode (Default)
1: Master Mode
PLL3-0: PLLج४ΫϩοΫͷબ୒(See Table 4)
Default: “1001”(MCKI pin=12MHz)
D4
PLL2
0
D3
PLL1
0
D2
PLL0
1
D1
D0
M/S
PMPLL
0
0
MS0404-J-00
- 42 -
2005/08