AK5701 Datasheet, PDF (28/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
„ όΠύεϞʔυ
THR bit = “1”, M/S bit = “0”, PMADL bit = “0”, PMADR bit = “0”ͷ৔߹ɺEXLRCK, EXBCLK, EXSDTI pinsͷೖ
ྗΫϩοΫ͓ΑͼσʔλΛͦΕͧΕLRCK, BCLK, SDTO pins΁εϧʔग़ྗ͠·͢ɻ
THR bit = “1”, M/S bit = “0”ͰPMADL bit = “1” or PMADR bit = “1”ͷ৔߹ɺEXLRCK, EXBCLK pinsͷೖྗΫϩ
οΫΛLRCK, BCLK pins΁εϧʔग़ྗ͠ɺSDTO pin͔ΒADCσʔλΛग़ྗ͠·͢ɻ
THR bit
0
1
M/S bit
0
1
0
1
PMADL bit
PMADR bit
“00”
“01”/“10”/”11”
“00”
“01”/“10”/”11”
“00”
“01”/“10”/”11”
“00”
“01”/“10”/”11”
BCLK/LRCK
SDTO
“L”
“L”
“L”
ADC data
Output
“L”
Output
ADC data
EXBCLK/EXLRCK EXSDTI
EXBCLK/EXLRCK ADC data
N/A
N/A
Output
ADC data
Table 14. Bypass Mode Select
Mode
Figure
Power down
Slave mode
Power down
Master mode
Bypass mode
Slave & Bypass
N/A
Master mode
Figure 24
Figure 25
Default
DSP or µP
BCLK
LRCK
SDTI
DSP or µP
BCLK
LRCK
SDTI
≥ 32fs
1fs
AK5701
BCLK
LRCK
SDTO
EXBCLK
EXLRCK
EXSDTI
≥ 32fs
1fs
≥ 32fs
1fs
Figure 24. Bypass Mode
AK5701
BCLK
LRCK
SDTO
EXBCLK
EXLRCK
LIN/RIN
≥ 32fs
1fs
Analog In
Figure 25. Slave & Bypass Mode
DSP or µP
BCLK
LRCK
SDTO
DSP or µP
BCLK
LRCK
MS0404-J-00
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2005/08