AK5701 Datasheet, PDF (32/62 Pages) Asahi Kasei Microsystems – PLL & MIC-AMP 16-Bit Stereo ADC

ASAHI KASEI
[AK5701]
EXLRCK
LRCK
0 1 2 3 8 9 10 11 12 13 14 15 0 1 2 3 8 9 10 11 12 13 14 15 0 1
EXBCLK(32fs)
BCLK(32fs)
SDTO(o)
15 14 13 8 7 6 5 4 3 2 1 0 15 14 13 8 7 6 5 4 3 2 1 0 15
0 1 23
EXBCLK(64fs)
BCLK(64fs)
14 15 16 17 18
31 0 1 2 3
14 15 16 17 18
SDTO(o)
15 14 13 13 2 1 0
15 14 13 1 2 1 0
15:MSB, 0:LSB
Lch Data
Rch Data
Figure 34. Mode 2 λΠϛϯά(લ٧Ί, M/S = “0” or “1”)
31 0 1
15
EXLRCK
LRCK
0 1 23 4
EXBCLK(32fs)
BCLK(32fs)
9 10 11 12 13 14 15 0 1 2 3 4
9 10 11 12 13 14 15 0 1
SDTO(o)
0 15 14 13 7 7 6 5 4 3 2 1 0 15 14 13 7 7 6 5 4 3 2 1 0
0 1 23 4
EXBCLK(64fs)
BCLK(64fs)
14 15 16 17 18
SDTO(o)
15 14 13
210
31 0 1 2 3 4 14 15 16 17 18
15 14 13 2 2 1 0
31 0 1
15:MSB, 0:LSB
Lch Data
Rch Data
Figure 35. Mode 3 λΠϛϯά(I²S, M/S = “0” or “1”)
„ ϞϊϥϧʗεςϨΦ੾ସ
PMADL, PMADR, MIX bitsͷઃఆʹΑΓADCग़ྗσʔλͷϞϊϥϧʗεςϨΦΛ੾Γସ͑Δ͜ͱ͕Ͱ͖·
͢ɻԼදͷσʔλʹରͯ͠ALCಈ࡞(ALC bit = “1”)·ͨ͸σΟδλϧϘϦϡʔϜಈ࡞(ALC bit = “0”)͕ߦΘΕ
·͢ɻ
PMADL bit
0
0
1
1
PMADR bit MIX bit
ADC Lch data
ADC Rch data
0
x
All “0”
All “0”
1
x
Rch Input Signal
Rch Input Signal
0
x
Lch Input Signal
Lch Input Signal
1
0
Lch Input Signal
Rch Input Signal
1
(L+R)/2
(L+R)/2
Table 17. ϞϊϥϧʗεςϨΦ੾ସ (x: Don’t care)
Default
MS0404-J-00
- 32 -
2005/08