AK7714 Datasheet, PDF (44/48 Pages) Asahi Kasei Microsystems – 20-Bit Audio Codec with DSP and Delay RAM

[ASAHI KASEI]
[AK7714]
(2) Peripheral circuit
1) Ground and power supply
To minimize digital noise coupling, AVDD and DVDD are individually decoupled in AK7714. System analog power is
supplied to AVDD, AVB and DVB. AVB and DVB are connected to each other through the IC board, and eventually
have several ohms of resistance. If the set of AVDD, AVB and DVB and DVDD are driven by individual power sources,
start up AVDD, AVB and DVB simultaneously with DVDD, or start up AVDD, AVB and DVB first.
Generally, power supply and ground wires must be connected separately according to the analog and digital systems.
Connect them at a position close to the power source on the PC board. Decoupling capacitors, and ceramic capacitors
of small capacity in particular, should be connected at positions as close as possible to the AK7714.
If the absolute maximum rating conditions of a power supply cannot be maintained depending on the system, it is
recommended to supply the AK7714 power from the same regulator. Power patterns must be separated into analog
and digital patterns. For a digital pattern, connection must be made through an appropriate one-ohm resistor from the
regulator. In this case, the capacitor with the larger capacity must be connected to the analog side.
2) Reference voltage
The input voltage difference between the VRADH pin and the VRADL pin determines the full scale of analog input, while
the potentials difference between the VRDAH pin and the VRDAL pin determines the full scale of the analog output.
Normally, connect AVDD to VRADH and VRDAH, and connect 0.1µF ceramic capacitors from them to AVSS. VCOM is
used as the common voltage of the analog signal.
To shut out high frequency noise, connect a 0.1µF ceramic capacitor in parallel with an appropriate 10µF electrolytic
capacitor between this pin and AVSS. The ceramic capacitor in particular should be connected at a position as close as
possible to the pin. Do not lead current from the VCOM pin. To avoid coupling to the AK7714, digital signals and clock
signals in particular should be kept away from the VRADH, VRADL, VRDAH, VRDAL and VCOM pins as far as possible.
3) Analog input
Analog input signals are applied to the modulator through the differential input pins of each channel. The input voltage
is equal to the differential voltage between AIN+ and AIN- (∆VAIN = (AIN+) - (AIN-)), and the input range is
±FS = ±(VRADH - VRADL) × 0.4.
When VRADH = 5V and VRADL = 0V, the input range is within ±2.0 V. The output code format is given in terms of 2's
complements. Table 1 shows the output code relative to input voltage.
Input voltage
> (+FS - 1.5 LSB)
-0.5 LSB
Output code
(hexadecimal)
20 bit
3FFFF
00000
7FFFF
> (-FS + 0.5 LSB)
80000
Table 1. Output code relative to input voltage
When fs = 48 kHz, the AK7714 samples the analog input at 3.072 MHz. The digital filter eliminates noise from 30 kHz to
3.042 MHz. However, noise is not rejected in the bandwidth close to 3.072 MHz. Most audio signals do not have large
noise in the vicinity of 3.072 MHz, so a simple RC filter is sufficient.
A/D converter reference voltage is applied to the VRADH and VRADL pins. Normally, connect AVDD to VRADH, and
AVSS to VRADL. To eliminate high frequency noise, connect a 0.1µF ceramic capacitor in parallel with a 10µF
electrolytic capacitor between the VRADH pin and VRADL.
M0018-E-00
- 44 -
‘98/07