AK7714 Datasheet, PDF (31/48 Pages) Asahi Kasei Microsystems – 20-Bit Audio Codec with DSP and Delay RAM

[ASAHI KASEI]
[AK7714]
b) Program RAM write (during reset phase)
The program RAM write operation is performed during the reset phase according to data comprising a set of 7 bytes (in
case of 1-word program RAM writting). When all data has been transferred, the RDY terminal is set to "L". Upon
completion of writing into PRAM, it goes to "H" to allow the next data to be input. When data of continuous addresses is
{ { written, input the data( ⁴ to ⁷ ) of after the next address as is. (No command code or address is required and RESET
and WRQ hold to “L”.) To write discontinuous data, shift the WRQ terminal from "H" to "L" again. Then input the
command code, address and data in that order. (For RESET, operate both CODEC RESET and DSP RESET
simultaneously.)
Data transfer procedure
{¹ Command code (11000000)
{² Address upper (0000000A8)
{³ Address lower (A7......A0)
{⁴ Data
(D15 .....D8)
{⁵ Data
(D23 .....D16)
{⁶ Data
(D15 .....D8))
{⁷ Data
(D7......D0)
Input of continuous address data into PRAM
M0018-E-00
Input of discontinuous address data into PRAM
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