AK7714 Datasheet, PDF (42/48 Pages) Asahi Kasei Microsystems – 20-Bit Audio Codec with DSP and Delay RAM

[ASAHI KASEI]
[AK7714]
2) Use as ADC and DAC (mainly for test)
Only the ADC and DAC sections can be operated while keeping the DSP section in the reset state with the independent
control of DSP RESET and CODEC RESET. (When no DSP processing is required, power saving and noise reduction
can be expected. However, the ADC data cannot be output in internal connection mode. In external connection mode,
it is output from SDOUTA.)
In internal connection mode, setting of the control registers allows the following operations to be performed:
a) ADC to DAC1 and DAC2 (Analog to Analog)
The ADC output data is directly connected over to DAC1 and DAC2. (C6 = 1, C7 = 0)
When input to the DAC2 is not required, set C5 = 1.
(When input to the DAC1 is not required, set C4 = 1.)
b) SDIN1 to DAC1 and DAC2
SDIN1 input data is directly connected to DAC1 and DAC2. (C6 = 1, C7 = 1)
In this case, only the MSB-first 20-bit input (including I²S compatibility: C0 = 1) is supported.
When input to DAC2 is not required, set C5 = 1.
(When input to DAC1 is not required, set C4 = 1.)
For this operation, set only CODEC RESET to "H" after setting the control registers during the system reset phase
(DSP RESET = CODEC RESET = "L"). To make a new setting, be sure to perfom the system reset.
M0018-E-00
- 42 -
‘98/07