AK7714 Datasheet, PDF (30/48 Pages) Asahi Kasei Microsystems – 20-Bit Audio Codec with DSP and Delay RAM

[ASAHI KASEI]
[AK7714]
1) Write during reset phase
a) Control register write (during reset phase)
Data comprising a set of three bytes is used to perform the control register write operation (during the reset phase).
When all data has been transferred, the RDY terminal goes to "L". It goes to "H" upon completion of the write operation.
Data transfer procedure
{¹ Command code (00000110)
{² Control data
(C15.....C8)
{³ Control data
(C7 .....C0)
The register to control the operation mode of this LSI comprises 16 bits. For the function of each bit, see the description
of 5) "Control registers" on page 22.
Control register write operation
M0018-E-00
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‘98/07