AK7714 Datasheet, PDF (36/48 Pages) Asahi Kasei Microsystems – 20-Bit Audio Codec with DSP and Delay RAM

[ASAHI KASEI]
[AK7714]
b) CRAM data read (during reset phase)
To read out the written coefficient data, input the command code and the address you want to read out. After that, set
SI to "H" and SCLK to "L" as preparation. Then, when SI is set to "L", the data is output from SO in synchronization with
the falling edge of SCLK.
If there are continuous addresses to be read, repeat the above procedure starting from the step where SI is set to "H".
Data transfer procedure
{¹ Command code
{² Address
(10100001)
(0......A8)
(A7......A0)
Reading of CRAM data
M0018-E-00
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‘98/07