AK4562 Datasheet, PDF (27/29 Pages) Asahi Kasei Microsystems – LOW POWER 20BIT CODEC WITH PGA

ASAHI KASEI
[AK4562]
1. Grounding and Power Supply Decoupling
The AK4562 requires careful attention to power supply and grounding arrangements. VA and VD are usually supplied
from analog supply in system. Alternatively if VA and VD are supplied separately, the power up sequence is not critical.
VT is a power supply pin to interface with the external ICs and is supplied from digital supply in system. AGND and
DGND of the AK4562 should be connected to analog ground plane. System analog ground and digital ground should be
connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors should be
as near to the AK4562 as possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference
The differential voltage between VREF and AGND sets the analog input/output range. VREF pin is normally connected to
VA with a 0.1uF ceramic capacitor. VCOM is a signal ground of this chip. An electrolytic capacitor 2.2uF parallel with a
0.1uF ceramic capacitor attached to VCOM pin eliminates the effects of high frequency noise. No load current may be
drawn from VCOM pin. All signals, especially clocks, should be kept away from the VREF and VCOM pins in order to
avoid unwanted coupling into the AK4562.
3. Analog Inputs
The analog inputs are single-ended and the input resistance 9kΩ (typ). The input signal range scales with the VREF voltage
and nominally 0.6 x VREF Vpp (typ) centered in the internal common voltage (typ. 0.45 x VA). Usually, the input signal
cuts DC with a capacitor. The cut-off frequency is fc=(1/2πRC). The AK4562 can accept input voltages from AGND to
VA. The ADC output data format is 2’s complement. The output code is 7FFFFH(@20bit) for input above a positive full
scale and 80000H(@20bit) for input below a negative fill scale. The ideal code is 00000H(@20bit) with no input signal.
The DC offset including ADC own DC offset removed by the internal HPF (fc=3.4Hz).
4. Analog Outputs
The analog outputs are also single-ended and centered around the VCOM voltage (typ 0.45 x VA). The input signal range
scales with the supply voltage and nominally 0.6 x VREFH Vpp (typ). The DAC input data format is 2’s complement. The
output voltage is a positive full scale for 7FFFFH(@20bit) and a negative full scale for 80000H(@20bit). The ideal output
is VCOM voltage for 00000H(@20bit). If the noise generated by the delta-sigma modulator beyond the audio band would
be the problem, the attenuation by external filter is required.
DC offsets on analog outputs are eliminated by AC coupling since DAC outputs have VCOM and DC offsets of a few mV.
MS0031-E-00
- 27 -
2000/05