AK4562 Datasheet, PDF (10/29 Pages) Asahi Kasei Microsystems – LOW POWER 20BIT CODEC WITH PGA

ASAHI KASEI
[AK4562]
n Timing Diagram
1/fCLK
MCLK
VIH
VIL
tCLKH
tCLKL
1/fs
LRCK
VIH
VIL
tBLK
BCLK
VIH
VIL
tBLKH
tBLKL
Figure 1. Clock Timing
LRCK
BCLK
SDTO
SDTI
tBLR
tDLR
tSDS
LSB
tSDH
tDSS
D20 (MSB)
Figure 2. Audio Data Input/Output Timing (Audio I/F = No.0)
VIH
VIL
VIH
VIL
50%VT
VIH
VIL
CSN
CCLK
CDTI
tCSS
tCCKL tCCKH
tCDS tCDH
op0
op1
op2
Figure 3. WRITE Command Input Timing (AKM)
VIH
VIL
VIH
VIL
A0
VIH
VIL
MS0031-E-00
- 10 -
2000/05