AK4584_01 Datasheet, PDF (26/53 Pages) Asahi Kasei Microsystems – 24Bit 96kHz Audio CODEC with DIT/DIR

ASAHI KASEI
[AK4584]
„ Error Handling
The following eight events will cause the INT1-0 pins go to “H”.
(1) UNOCK: “1” when PLL goes to an UNLOCK state.
The AK4584 loses lock when the distance between two preambles is not correct or when those preambles
are not correct.
(2) PAR:
“1” when parity error or biphase coding error is detected.
Updated every sub-frame cycle. Reading this register resets it.
(3) AUTO: “1” when Non-Linear PCM Bit Stream is detected.
(4) DTSCD: “1” when DTS-CD Bit Stream is detected.
(5) AUDION:“1” when the “AUDIO” bit in recovered channel status indicates “1”.
(6) PEM: “1” when “PEM” in recovered channel status indicates “1”.
Updated every block cycle.
(7) V:
“1” when validity flag is detected.
(8) FS:
“1” when FS3-0 bits change.
FS3-0 bits are changed, FS bit is “H” during 1 sub-frame.
The contents of FS3-0 bits are the frequency detection result by fs-bit of C-bit or X’tal (refer to Table 12),
this is compared last data every one block. Reading this register resets it.
INT1-0 pins output the OR’ed signal among those eight factors. However, each mask bit can mask each factor. When a bit
masks a factor, the factor does not affect INT1-0 pins operation (those masks do not affect those registers (UNLOCK,
PAR, etc.) themselves). Once INT0 pin goes to “H”, it maintains “H” for 1024 cycles (this value can be changed by
EFH1-0 bits) after the all factors are removed. Once the PAR bit and the FS bit go to “1”, it holds “1” until reading the
register.
While the AK4584 loses lock, the channel status bits are not updated and hold the previous data. In its initial state, INT0
pin outputs the OR’ed signal between UNLOCK and PAR bits. INT1 pin outputs the OR’ed signal among AUTO,
DTSCD, AUDION and VDIR bits.
INT1-0 pins are “L” when the PLL is OFF.
Register
UNLOCK PAR AUTO DTSCD AUDION PEM VDIR FS
1
x
x
x
x
x
x
x
0
1
x
x
x
x
x
x
0
0
1
x
x
x
x
x
0
0
x
1
x
x
x
x
0
0
x
x
1
x
x
x
0
0
x
x
x
1
x
x
0
0
x
x
x
x
1
x
0
0
x
x
x
x
x
1
Table 15. Error Handling (x : Don’t Care)
Pin
SDTO
“L”
Previous Data
Output
Output
Output
Output
Output
Output
TX
Output
Output
Output
Output
Output
Output
Output
Output
MS0118-E-00
- 26 -
2001/11