AK4584_01 Datasheet, PDF (23/53 Pages) Asahi Kasei Microsystems – 24Bit 96kHz Audio CODEC with DIT/DIR

ASAHI KASEI
[AK4584]
„ Biphase Input
Four receiver inputs (RX1-4 pins) are available. Each input includes an unbalanced input amplifier and can accept input
signals of 200mV or more.
IPS1
IPS0
Input Data
0
0
RX1
Default
0
1
RX2
1
0
RX3
1
1
RX4
Table 8. Recovery Data Select
„ Biphase Output
The AK4584 can output the through data from the digital receiver inputs (RX1-4) to the TX1/2 pins. The TX3 pin can
output transmitter data (SDTI data, A/D converted data and through output from the DIR). The OPS1-0 bits can select the
source of the output from the TX1-2 pins and the DIT1-0 bits can select the source of the TX3 pin.
The first 5 bytes of C-bit (Channel Status) can be controlled by CT39-CT0 bits in the control registers. When CT0 bit = “0”
(consumer mode), bits20-23 (Audio channel) cannot be controlled directly. When the TCH bit is “1”, the AK4584 outputs
“1000” as CT20-23 bits for left channel and outputs “0100” at CT20-23 bits for right channel automatically. When TCH
bit is “0”, the AK4584 outputs “0000”.
The U bit (User Data) output has two formats. When the UDIT bit is “0”, the U bit is always “L”. When UDIT bit is “1”,
the recovered U bits are passed through the DIT (DIR-DIT loop mode of U bit). This mode is only available when the PLL
is locked. When PLL is unlocked, the U bit is set to “L”.
OPS1
OPS0
Output Data
0
0
RX1
0
1
RX2
1
0
RX3
1
1
RX4
Table 9. Output Data Select for TX1/2
Default
DIT1
0
0
1
1
DIT0
Input Source
0
ADC
1
SDTI
0
DIR
1
N/A
Table 10. Output Data Select for TX3
Default
Note: When the PLL loses lock, the V bit (Validity) data in the block immediately following loss-of-lock may not be
accurate. Disregard this data and use the following data blocks.
MS0118-E-00
- 23 -
2001/11