English
Language : 

AK4563A Datasheet, PDF (23/39 Pages) Asahi Kasei Microsystems – Low Power 16bit 4ch ADC & 2ch DAC with ALC
ASAHI KASEI
[AK4563A]
Addr
04H
Register Name
ALC Mode Control 1
R/W
RESET
D7
D6
D5
D4
D3
D2
D1
D0
0
0 LMAT1 LMAT0 FDATT RATT1 RATT0 LMTH
R/W
0
0
0
0
0
0
0
0
LMTH: Auto Limiter Detection Level / Auto Recovery Waiting Counter Reset Level
LMTH ALC Limiter Detection Level ALC Recovery Waiting Counter Reset Level
0
ADC Input ≥ –4.0dB
-4.0dB > ADC Input ≥ -6.0dB
1
ADC Input ≥ –2.0dB
-2.0dB > ADC Input ≥ -4.0dB
Table 10. Auto Limiter Detection Level / Auto Recovery Waiting Counter Reset Level
RESET
RATT1-0: ALC Recovery GAIN Step
During the ALC recovery operation, the number of steps changed from current IPGA value is set. For
example, when the current IPGA value is 30H, RATT1= “0”, RATT0= “1” are set, IPGA changes to
32H by the auto limiter operation, the input signal level is gained by 1dB (=0.5dB x 2).
When the IPGA value exceeds the reference level (REF6-0), the IPGA value does not increase.
RATT1 RATT0 GAIN Step
0
0
1
RESET
0
1
2
1
0
3
1
1
4
Table 11. ALC Recovery GAIN Step
FDATT: FADEIN/OUT ATT Step
During the FADEIN/OUT operation, the number of steps changed from current IPGA value is set. For
example, when the current IPGA value is 30H, FDATT = “1” are set, IPGA changes to 32H (FADEIN)
or 2EH (FADEOUT) by the FADEIN/OUT operation, the input signal level is gained by 1dB(=0.5dB x
2).
When the IPGA value exceeds the reference level (REF6-0) or 00H, the IPGA value does not increase.
FDATT ATT Step
0
1
RESET
1
2
Table 12. FADEIN/OUT ATT Step
LMAT1-0: ALC Limiter ATT Step
During the ALC limiter operation, when input signal exceeds the ALC limiter detection level set by
LMTH, the number of steps attenuated from current IPGA value is set. For example, when the current
IPGA value is 68H in the state of LMAT1-0 = “11”, it becomes IPGA=64H by the ALC limiter
operation, the input signal level is attenuated by 2dB (=0.5dB x 4).
The ALC limiter period is set by LTM1-0 bits at ZELMN = “1” and ZTM1-0 bits at ZELMN = “0”.
When the attenuation value exceeds IPGA = “00H” (MUTE), it clips to “00”.
LMAT1 LMAT0 ATT Step
0
0
1
RESET
0
1
2
1
0
3
1
1
4
Table 13. ALC Limiter ATT Step
MS0067-E-02
- 23 -
2004/12