82-000770-01 Datasheet, PDF (48/91 Pages) Analog Devices – ADSP-TS201S EZ-KIT Lite Evaluation System

Configuration Resistors
Table 2-11. Processor B ID Pins Configuration (Cont’d)
R122 (Net: ID2_B)
Not populated
Populated
Populated
Populated
Populated
1 Default settings
R123 (Net: ID1_B)
Populated
Not populated
Not populated
Populated
Populated
R124 (Net: ID0_B)
Populated
Not populated
Populated
Not populated
Populated
ID[2:0] Value
3
4
5
6
7
Clock Mode Settings
The resistors on the clock generator (U1) and the resistors on the
SCLKRAT2–0 pins of each of the processors determine the frequency at
which the two processors operate. The frequency supplied to CLKIN of the
processor also can be changed by replacing the 20 MHz oscillator (U18)
shipped with the board with a different oscillator. Ensure that the selected
clock mode and frequency do not exceed the minimum and maximum
specifications of the ADSP-TS201S processor as noted in the product data
sheet.
The final frequency at which the processors operate is determined by the
following equation:
(Freq of U18)*(Mult Factor of U1)*(Mult Factor of SCLKRAT pins) =
Final Oper Freq
The default frequency factory setting is 20 MHz*5*5 = 500 MHz.
2-12
ADSP-TS201S EZ-KIT Lite Evaluation System Manual