82-000770-01 Datasheet, PDF (32/91 Pages) Analog Devices – ADSP-TS201S EZ-KIT Lite Evaluation System

Programmable FLAG Pins
Table 1-2. Flash Memory Map (Cont’d)
Start Address
0x3004 0000
0x3005 0000
0x3006 0000
0x3007 0000
End Address
0x3004 FFFF
0x3005 FFFF
0x3006 FFFF
0x3007 FFFF
Content
Uniform block 4
Uniform block 5
Uniform block 6
Uniform block 7
To program the flash memory with your boot code, first create a loader
file from your processor code. You set up the loader in VisualDSP++
depending on how you plan to boot the flash. For information on creating
a loader file, refer to VisualDSP++ online help and the VisualDSP++
Loader and Utilities Manual.
Next, the loader file must be programmed into the flash memory. This can
be done using the VisualDSP++ Flash Programmer utility (see online
Help).
Programmable FLAG Pins
Each ADSP-TS201S processor has four programmable flag pins. Two flag
pins from each processor (FLAG0 and FLAG1) allow interaction with the
running program through the use of a switch (SW6–9). The FLAG2 and
FLAG3 pins from each processor are connected to LEDs (LED3–6).
After the processor is reset, the programmable flags are configured as
inputs. The direction of each programmable FLAG is configured in the
FLAGREG register. If the flag is configured for output, the value of the flag
pin is set in the FLAGREG register. If the flag is configured for input, the
value on the flag pin is read from the SQSTAT register. Programmable flags
are summarized in Table 1-3. For more information on how to configure
the programmable flag pins, see the ADSP-TS201S TigerSHARC Processor
Hardware Reference.
1-10
ADSP-TS201S EZ-KIT Lite Evaluation System Manual