82-000770-01 Datasheet, PDF (40/91 Pages) Analog Devices – ADSP-TS201S EZ-KIT Lite Evaluation System

System Architecture
Table 2-1. Expansion Interface Connectors (Cont’d)
Connector
J2
J3
Interfaces
2.5V, GND, SDRAM control signals, flags, IRQs, timers, data
GND, reset, DMA, memory control, CLKOUT, Link Ports signals
When you use the expansion interface, limits to the current and to the
interface speed must be taken into consideration. The maximum current
limit depends on the regulator capabilities. Additional circuitry can also
add extra loading to signals, decreasing their maximum effective speed.
L Analog Devices does not support and is not responsible for the
effects of additional circuitry.
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the processor’s
internal and external memory, as well as the special function registers
through a 14-pin header. See “JTAG (ZP4)” on page 2-21 for more infor-
mation about the JTAG connector. To learn more about available
emulators, contact Analog Devices as described in “Product Information”.
For more information about the JTAG interface and JTAG custom board
design, refer to EE-68 found at the Analog Devices Web site.
2-4
ADSP-TS201S EZ-KIT Lite Evaluation System Manual