HMC702LP6CE Datasheet, PDF (36/38 Pages) Hittite Microwave Corporation – 14 GHz 16-Bit Fractional-N Synthesizer

v10.0812
HMC702LP6CE
14 GHz 16-BIT FRACTIONAL-N PLL

Table 33. Reg 1Ch Phase Detector CSP Register
Bit
Type
Name
Default
3:0
R/W pfds_sat_deltaN
0
4
R/W pfds_rstb_force
0
5
R/W pfds_rstb
1
Description
0= Cycle Slip Prevention (CSP) disabled
4-bit value to advance or retard phase detector in
VCO cycles if it reaches 2pi , i.e. cycle slip
prevention. 1st bit is polarity, enabled by rstb
CSP PFD Flip-flops RSTB:
1 - controlled by the pfds_rstb bit:
0 - auto-controlled by the CSP logic
Forces the PFD into reset, which tri-states
charge pump, freezes charge on the loop filter,
and hence opens the loop. Program 0
CSP PFD FF rstb
1 - Enables the Cycle Slip Prevention (CSP)
feature of the PFD (also need Reg 1[15]=1)
Table 34. Reg 1Dh Reserved
Bit
Type
Name
23:0
RO
Reserved
Default
0
Reserved
Description
Table 35. Reg 1Eh Temperature Sensor Register
Bit
Type
Name
Default
0
R/W tsens_spi_enable
0
Description
Enable the temperature sensor, draws ~2mA
current, must strobe tsens_spi_strobe Reg 00h
<3>
Table 36. Reg 1Fh LD, VCO & Ramp Busy Read Only Register
Bit
Type
Name
Default
Description
0
RO
ro_lock_detect
0
1 = locked, 0 = unlocked
3:1
RO
ro_dsm_overflow
0
1 = modulator overflow
4
RO
Reserved
0
Reserved
5
RO
ro_ramp_busy
0
Sweeper status flag, set when ramp is busy,
cleared when at end of ramp or not used
Table 37. Reg 20h Reserved
Bit
Type
Name
23:0
RO
Reserved
Default
20h
Reserved
Description
Table 38. Reg 21h Temperature Sensor Read Only Register
Bit
Type
Name
Default
Description
6:0
RO
tsens_temperature
Current Temperature from temp sensor
lsb = 17.5°C
1Fh
0000111 = Temp >= 82.5°C
0000110 = Temp
0000000 = Temp <=-22.5°C
tsens_temperature = floor ((Temp+40)/17.5)
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