HMC702LP6CE Datasheet, PDF (15/38 Pages) Hittite Microwave Corporation – 14 GHz 16-Bit Fractional-N Synthesizer

v10.0812
HMC702LP6CE
14 GHz 16-BIT FRACTIONAL-N PLL

Charge Pump & Phase Frequency Detector (PFD)
The Phase Frequency Detector or PFD has two inputs, one from the reference path divider and one from the VCO path
divider. The PFD compares the phase of the VCO path signal with that of the reference path signal and controls the
charge pump output current as a linear function of the phase difference between the two signals. The output current
varies linearly over a full ±2π radians input phase difference.
PFD Functions
phase_sel (Reg05h<0> Table 11) inverts the phase detector polarity for use with an inverting opamp or negative
slope VCO
upout_en in Reg05h<1> Table 11 allows masking of the PFD up output, which effectively prevents
the charge pump from pumping up.
dnout_en in Reg05h<2> Table 11 allows masking of the PFD down output, which effectively
prevents the charge pump from pumping down.
Charge Pump Tri-State
De-asserting both upout_en and dnout_en effectively tri-states the charge pump while leaving all other functions
operating internally.
PFD Jitter & Lock Detect Background
In normal phase locked operation the divided VCO signal arrives at the phase detector in phase with the divided
crystal signal, known as the reference signal. Despite the fact that the device is in lock, the phase of the VCO signal
and the reference signal vary in time due to the phase noise of the crystal and VCO oscillators, the loop bandwidth
used and the presence of fractional modulation or not. The total integrated noise on the VCO path normally dominates
the variations in the two arrival times at the phase detector if fractional modulation is turned off.
If we wish to detect if the VCO is in lock or not we need to distinguish between normal phase jitter when in lock and
phase jitter when not in lock.
First, we need to understand what is the jitter of the synthesizer, measured at the phase detector in integer or fractional
modes.
The standard deviation of the arrival time of the VCO signal, or the jitter, in integer mode may be estimated with a
simple approximation if we assume that the locked VCO has a constant phase noise, Ф² (ƒ₀), at offsets less than
the loop 3 dB bandwidth and a 20 dB per decade roll off at greater offsets. The simple locked VCO phase noise
approximation is shown on the left of Figure 11.
Figure 11. Synthesizer Phase Noise & Jitter
15
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