Z86E6116PSC Datasheet, PDF (64/69 Pages) Zilog, Inc. – Z86E61/Z86E63 CMOS Z8 16K/32K EPROM Microcontroller

Z86E61/E63
CMOS Z8 16K/32K EPROM Microcontroller
60
Table 32. Instruction Summary (Continued)
Instruction
and Operation
RP←src
STOP
SUB dst, src
dst←dst←src
SWAP dst
↓
7
07
0
↑
TCM dst, src
(NOT dst)
AND src
TM dst, src
dst AND src
XOR dst, src
dst←dst
XOR src
Address Mode
dst
src
Opcode
Flags Affected
Byte (Hex) C Z S V D H
Note^a
6F
1-
-
-
-
-
2[ ]
[
[
[
[
1[
R
IR
Note^a
F0
X*
*
X-
-
F1
6[ ]
-
*
*
0-
-
Note^a
Note^a
7[ ]
-
*
*
0-
-
B[ ]
-
*
*
0-
-
a. These instructions have an identical set of addressing modes, which are encoded for brevity. The first Op
Code nibble is found in the instruction set table above. The second nibble is expressed symbolically by a
’[ ]’ in this table, and its value is found in the following table to the left of the applicable addressing mode pair.
For example, the opcode of an ADC instruction using the addressing modes r (destination) and Ir (source)
is 13.
Address Mode
dst
src
r
r
r
Ir
R
R
R
IR
R
IM
IR
IM
Lower
Opcode Nibble
[2]
[3]
[4]
[5]
[6]
[7]
PS014401-1001