Z86E6116PSC Datasheet, PDF (15/69 Pages) Zilog, Inc. – Z86E61/Z86E63 CMOS Z8 16K/32K EPROM Microcontroller

Z86E61/E63
CMOS Z8 16K/32K EPROM Microcontroller
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PIN FUNCTIONS
ROMless (Input, Active Low).
Connecting this pin to GND disables the internal ROM and forces the device to
function as a Z86C91 ROMless Z8 (see the Z86C91 product specification for
more information). When pulled High to V_CC, the device functions as a normal
Z86E61/E63 EPROM version.
Note: ^{This pin is only available on the 44-pin versions of the Z86E61/}
E63.
DS (Output, Active Low).
Data Strobe is activated once for each external memory transfer. For a READ
operation, data must be available prior to the trailing edge of DS. For WRITE
operations, the falling edge of DS indicates that output data is valid.
AS (Output, Active Low).
Address Strobe is pulsed once at the beginning of each machine cycle. Address
output is through Port 1 for all external programs. Memory address transfers are
valid at the trailing edge of AS. Under program control, AS can be placed in the
high-impedance state along with Ports 0 and 1, Data Strobe, and Read/Write.
XTAL2, XTAL1
Crystal 2, Crystal 1 (time-based input and output, respectively). These pins con-
nect a parallel-resonant crystal, ceramic resonator, LC, or any external single-
phase clock to the on-chip oscillator and buffer.
R/W (Output, Write Low).
The Read/Write signal is Low when the MCU is writing to the external program or
data memory.
RESET (Input, Active Low).
To avoid asynchronous and noisy reset problems, the Z86E61/E63 is equipped
with a reset filter of four external clocks (4TpC). If the external RESET signal is
less than 4TpC in duration, no reset occurs.
PS014401-1001