Z86E6116PSC Datasheet, PDF (27/69 Pages) Zilog, Inc. – Z86E61/Z86E63 CMOS Z8 16K/32K EPROM Microcontroller

Z86E61/E63
CMOS Z8 16K/32K EPROM Microcontroller
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(single pass mode) or to automatically reload the initial value and continue count-
ing (modulo-n continuous mode).
The counter, but not the prescalers, are read at any time without disturbing their
value or count mode. The clock source for T1 is user-definable and is either the
internal microprocessor clock divided-by-four, or an external signal input through
Port 3. The Timer Mode register configures the external timer input (P31) as an
external clock, a trigger input that can be retriggerable or non-retriggerable, or as
a gate input for the internal clock. Port 3 line P36 also serves as a timer output
(TOUT) through which T0, T1, or the internal clock can be output. The counter/
timers are cascaded by connecting the TO output to the input of T1.
OSC
+2
Internal
Clock
External Clock
Clock
Logic
+4
Internal Data Bus
Write
Write
Read
PRE0
Initial Value
Register
T0
Initial Value
Register
T0
Current Value
Register
6-Bit
+4
Down
Counter
6-Bit
Down
Counter
8-Bit
Down
Counter
+2
8-Bit
Down
Counter
IRQ4
Serial I/O
Clock
T_OUT
P36
IRQ5
Internal Clock
Gated Clock
Triggered Clock
T_IN P31
PRE1
Initial Value
Register
T1
Initial Value
Register
T1
Current Value
Register
Write
Write
Read
Internal Data Bus
Figure 15. Counter/Timers Block Diagram
Interrupts
The Z86E61/E63 has six different interrupts from eight different sources. The
interrupts are maskable and prioritized. The eight sources are divided as follows:
four sources are claimed by Port 3 lines P33-P30, one in Serial Out, one in Serial
In, and two in the counter/timers (Figure 16). The Interrupt Mask Register globally
PS014401-1001