Z86E6116PSC Datasheet, PDF (29/69 Pages) Zilog, Inc. – Z86E61/Z86E63 CMOS Z8 16K/32K EPROM Microcontroller

Z86E61/E63
CMOS Z8 16K/32K EPROM Microcontroller
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nal sample point, which corresponds to the 63rd TpC cycle following the external
interrupt sample point.
Clock
The Z86E61/E63 on-chip oscillator has a high gain, parallel resonant amplifier for
connection to a crystal, LC, ceramic resonator, or any suitable external clock
source (XTAL1 = Input, XTAL2 = Output). The crystal should be AT cut, 1 MHz to
16 MHz max; series resistance (RS) is less than or equal to 100 Ohms. The crys-
tal should be connected across XTAL1 and XTAL2 using the recommended
capacitors (10 pF < CL < 100 pF) from each pin to ground (Figure 17).
Note: ^{Actual capacitor value specified by crystal manufacturer.}
C1
Pin 11
C2
XTAL1
C1
Pin 11
XTAL2
C2
Pin 11
XTAL1
L
XTAL2
Pin 11
Ceramic Resonator
or Crystal
LC Clock
XTAL1
XTAL2
External Clock
Figure 17. Oscillator Configuration
HALT
Turns off the internal CPU clock but not the XTAL oscillation. The counter/timers
and external interrupts IRQ0, IRQ1, IRQ2, and IRQ3 remain active. The devices
are recovered by interrupts, either externally or internally generated. An interrupt
request must be executed (enabled) to exit HALT mode. After the interrupt service
routine, the program continues from the instruction after the HALT.
STOP
This instruction turns off the internal clock and external crystal oscillation, and
reduces the standby current to 5 _uA (typical) or less. The STOP mode is termi-
nated by a reset, which causes the processor to restart the application program at
address 000Ch.
In order to enter STOP (or HALT) mode, it is necessary to first flush the instruction
pipeline to avoid suspending execution in mid-instruction. To do this, the user
PS014401-1001