Z87C33 Datasheet, PDF (5/72 Pages) Zilog, Inc. – CMOS Z8® MCU Consumer Controller Processor

Z87C33
CMOS Z8“ MCU Consumer Controller Processor
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List of Tables
Table 1. Family Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table 2. 28-Pin DIP/SOIC Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 3. Port 3 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Register Pointer Register—RP FDh/R253 Bank 0h: READ/WRITE . . 13
Table 5. Interrupt Types, Sources, and Vectors. . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 6. IRQ Register* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 7. Port Configuration Register—PCON 00h/R0 Bank Fh: WRITE ONLY. 22
Table 8. Stop-Mode Recovery Register 1—SMR1 0Bh/R11 Bank Fh: WRITE
ONLY, except Bit D7, which is READ ONLY . . . . . . . . . . . . . . . . . . 23
Table 9. Stop-Mode Recovery Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 10. Stop-Mode Recovery Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 11. Stop-Mode Recovery Register 2—SMR2 0Dh/R13 Bank Fh: WRITE
ONLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 12. Watch-Dog Timer Mode Register—WDTMR 0Fh/R15: WRITE
ONLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 13. WDT Time Select . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 14. Maximum (V_LV) Conditions: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 15. Expanded Register File Registers—Reset States . . . . . . . . . . . . . . . 32
Table 16. Timer Mode Register—TMR F1h/R241 Bank 0h: READ/WRITE. . . . 33
Table 17. Counter/Timer 1 Register—T1 F2h/R242 Bank 0h: READ/WRITE . . 33
Table 18. Prescaler 1 Register—PRE1 F3h/R243 Bank 0h: WRITE ONLY . . . 34
Table 19. Counter/Timer 0 Register—T0 F4h/R244 Bank 0h: READ/WRITE . . 35
Table 20. Prescaler 0 Register—PRE0 F5h/R245 Bank 0h: WRITE ONLY . . . 35
Table 21. Port 2 Mode Register—P2M F6h/R246 Bank 0h: WRITE ONLY . . . . 36
Table 22. Port 3 Mode Register—P3M F7h/R247 Bank 0h: WRITE ONLY . . . . 36
Table 23. Ports 0 and 1 Mode Register—P01M F8h/R248 Bank 0h: WRITE
ONLY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 24. Interrupt Priority Register—IPR F9h/R249 Bank 0h: WRITE ONLY . 37
Table 25. Interrupt Request Register—IRQ FAh/R250 Bank 0h: READ/WRITE 38
Table 26. Interrupt Mask Register—IMR FBh/R251 Bank 0h: READ/WRITE . . 39
Table 27. Flags Register—FLAGS FCh/R252 Bank 0h: READ/WRITE. . . . . . . 40
Table 28. Register Pointer—RP FDh/R253 Bank 0h: READ/WRITE. . . . . . . . . 41
Table 29. General Purpose—GPR FEh/R254 Bank 0h: READ/WRITE. . . . . . . 41
Table 30. Stack Pointer Low—SPL FFh/R255 Bank 0h: READ/WRITE . . . . . . 42
Table 31. Expanded Register File Registers—Reset States . . . . . . . . . . . . . . . 42
PS015601-1003
List of Tables