Z87C33 Datasheet, PDF (27/72 Pages) Zilog, Inc. – CMOS Z8® MCU Consumer Controller Processor

Z87C33
CMOS Z8“ MCU Consumer Controller Processor
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and V_LV Reset. An interrupt request must be enabled and executed to exit HALT
mode. After the interrupt service routine, the program continues from the instruc-
tion after the HALT.
In order to enter STOP (or HALT) mode, it is necessary to first flush the instruction
pipeline to avoid suspending execution in mid-instruction. The user must execute
a NOP (Op Code = FFh) immediately before the appropriate sleep instruction. For
example:
FF NOP ; clear the pipeline
6F STOP ; enter STOP mode
or
FF NOP ; clear the pipeline
7F HALT ; enter HALT mode
STOP. This instruction turns off the internal clock and external crystal oscillation.
The STOP instruction also reduces the standby current to 10 µA or less. The ana-
log comparators are automatically powered down in STOP-Mode. STOP mode is
terminated either by WDT time-out, POR, Stop-Mode Recovery, or any Reset. As
a result, the processor restarts the application program at address 000Ch. A WDT
time-out in STOP mode affects all registers the same as if a Stop-Mode Recovery
occurred via a selected Stop-Mode Recovery source except that the POR delay is
enabled even if the delay is selected for disable.
Note: If a permanent WDT is selected, the WDT runs in all modes and
cannot be stopped or disabled if the onboard RC oscillator is
selected to drive the WDT.
Port Configuration Register (PCON). The PCON register configures the ports indi-
vidually; comparator output on Port 3, open-drain on Port 0 and Port 1, low EMI on
Ports 0, 1, 2, and 3, and low-EMI oscillator. The PCON register is located in the
expanded register file at Bank F, location 00h (Table 8).
PS015601-1003